Programmable memory and cell

• US 5,487,037 A
• Filed: 02/19/1991
• Issued: 01/23/1996
• Est. Priority Date: 05/15/1989
• Status: Expired due to Fees

• Current Assignee: Dallas Semiconductor Corporation (Analog Devices, Inc.)
• Original Assignee: Dallas Semiconductor Corporation (Analog Devices, Inc.)
• Inventors: Lee, Robert D.
• Primary Examiner(s): Popek, Joseph A.
• Application Number:
  US07/657,717
• Time in Patent Office: 1,799 Days
• Field of Search: 365/96, 365/225.7, 365/190, 365/154, 365/189.11
• US Class Current: 365/189.11
• CPC Class Codes: G06F 3/0383 Signal control means within the pointing device
• CPC Class Codes: G06F 3/04897 Special input arrangements or commands for improving display capability
• CPC Class Codes: G06K 19/047 the record carrier being shaped as a coin or a gambling token
• CPC Class Codes: G06K 19/0706 the battery being replaceable
• CPC Class Codes: G06K 19/07743 External electrical contacts
• CPC Class Codes: G06K 7/0021 for reading/sensing record carriers having surface contacts
• CPC Class Codes: G06K 7/0086 the connector comprising a circuit for steering the operations of the card connector
• CPC Class Codes: G11C 5/00 Details of stores covered by group G11C11/00
• CPC Class Codes: G11C 5/066 Means for reducing external access-lines for a semiconductor memory clip, e.g. by multiplexing at least address and data signals
• CPC Class Codes: G11C 7/24 Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells
• CPC Class Codes: G11C 8/20 Address safety or protection circuits, i.e. arrangements for preventing unauthorized or accidental access

Abstract

An integrated circuit memory which includes at least some RAM/ROM hybrid columns. The RAM/ROM hybrid cells operate as normal SRAM cells forever, unless and until they are programmed to operate as ROM cells. Thus users who need the extra security permitted by ROM encoding can have this capability, while users who do not need ROM encoding can use off-the-shelf parts as RAM only.

Claims

1. An integrated circuit convertible memory cell, comprising:

(a) a bistable element having two states;

(b) a programmable clamp which when both programmed and activated puts said bistable element into a fixed one of said two states;

(c) a control node connected to said programmable clamp, with activation of said programmable clamp controlled by a signal on said control node, wherein;

(d) said bistable element includes two inverters with an output of each of said two inverters connected to an input of another of said two inverters;

(e) said programmable clamp includes for each of said inverters a fuse and a switch in series between said output and ground; and

(f) said signal on said control node controls said switches.