Nyquist filter for digital modulation

• US 5,487,089 A
• Filed: 02/11/1993
• Issued: 01/23/1996
• Est. Priority Date: 02/17/1992
• Status: Expired due to Fees

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Misaizu, Kouei, Honda, Shoichiro, Ohnishi, Hiroshi
• Primary Examiner(s): Chin, Stephen
• Assistant Examiner(s): Le, Amanda T.
• Application Number:
  US08/016,222
• Time in Patent Office: 1,076 Days
• Field of Search: 375/60, 375/103, 375/14, 375/19, 375/229-232, 375/292, 375/296, 375/346, 375/348, 375/350, 364/724.01, 364/724.13, 364/724.16, 364/724.19, 364/724.2
• US Class Current: 375/296
• CPC Class Codes: H04L 25/03133 with a non-recursive structure H04L25/03127 takes precedence

Abstract

An input bit sequence is converted into n-bit parallel symbol signals each representing one symbol. A shift register stores an "m" number of the n-bit parallel symbol signals, shifting the n-bit parallel symbol signals one symbol by one symbol and outputting them. At least one selector is operative for sequentially selecting one of the k-th symbol signal and the (m+1)-k-th symbol signal outputted by the shift register in response to a clock signal, where k equals 1, 2, . . . , (m-1)/2. A sampling counter serves to count pairs of successive clock pulses of the clock signal. An Exclusive-OR circuit executes Exclusive-OR operation between the clock signal and an output signal of the sampling counter. At least one first read-only memory stores data representing portions of predetermined impulse response waveforms, and outputs the data in response to an address signal having higher and lower parts. A second read-only memory stores data representing portions of predetermined impulse response waveforms, and outputs the data in response to an address signal having higher and lower parts. A filter output signal is generated by combining the data output by the first read-only memory and the second read-only memory.

Claims

1. A Nyquist filter for digital modulation, comprising:

a signal converter for converting an input bit sequence into n-bit parallel symbol signals each representing one symbol, where "n" denotes a given natural number;

a shift register connected to the signal converter for storing an "m" number of the n-bit parallel symbol signals, for shifting the n-bit parallel symbol signals one symbol by one symbol, and for outputting the n-bit parallel symbol signals, where "m" denotes a given odd natural number equal to or greater than 3;

a clock signal generator for generating a clock signal having a given frequency;

at least one selector for sequentially selecting one of the k-th symbol signal and the (m+1)-k-th symbol signal outputted by the shift register in response to the clock signal, where k equals 1, 2, . . . , (m-1)/2;

a sampling counter for counting pairs of successive clock pulses of the clock signal;

an Exclusive-OR circuit for executing Exclusive-OR operation between the clock signal and an output signal of the sampling counter;

at least one first read-only memory for storing first data representing first portions of predetermined impulse response waveforms which do not cause intersymbol interference, and for outputting the first data in response to an address signal having a higher part constituted by an output signal of the selector and a lower part constituted by an output signal of the Exclusive-OR circuit, wherein the predetermined impulse response waveforms have second portions and central portions different from the first portions thereof, and the first portions and the second portions of the predetermined impulse response waveforms are symmetrical with respect to the central portions thereof;

a second read-only memory for storing second data representing the central portions of the predetermined impulse response waveforms which do not cause intersymbol interference, and for outputting the second data in response to an address signal having a higher part constituted by the (m+1)/2-th symbol signal outputted by the shift register and a lower part constituted by the output signal of the sampling counter;

an adder for combining the first data outputted by the first read-only memory and the second data output by the second read-only memory; and

a digital-to-analog converter for converting an output signal of the adder into a corresponding analog signal,

wherein each of said first portions of the predetermined impulse response waveforms which are represented by the first data stored in the first read-only memory corresponds to one symbol, and each of said central portions of the predetermined impulse response waveforms which are represented by the second data stored in the second read-only memory corresponds to another symbol.

2. A Nyquist filter for digital modulation, comprising:

a signal converter for converting an input bit sequence into n-bit parallel symbol signals each representing one symbol, where "n" denotes a given natural number;

a shift register connected to the signal converter for storing an "m" number of the n-bit parallel symbol signals, for shifting the n-bit parallel symbol signals one symbol by one symbol, and for outputting the n-bit parallel symbol signals, where "m" denotes a given odd natural number equal to or greater than 3;

a clock signal generator for generating a clock signal having a given frequency;

at least one selector for sequentially selecting one of the k-th symbol signal and the (m+1)-k-th symbol signal outputted by the shift register in response to the clock signal, where k equals 1, 2, . . . , (m-1)/2;

a sampling counter for counting pairs of successive clock pulses of the clock signal;

an Exclusive-OR circuit for executing Exclusive-OR operation between the clock signal and an output signal of the sampling counter;

at least one first read-only memory for storing first data representing first portions of predetermined impulse response waveforms which do not cause intersymbol interference, and for outputting the first data in response to an address signal having a higher part constituted by an output signal of the selector and a lower part constituted by an output signal of the Exclusive-OR circuit, wherein the predetermined impulse response waveforms have second portions and central portions different from the first portions thereof, and the first portions and the second portions of the predetermined impulse response waveforms are symmetrical with respect to the central portions thereof;

a second read-only memory for storing second data representing the central portions of the predetermined impulse response waveforms which do not cause intersymbol interference, and for outputting the second data in response to an address signal having a higher part constituted by the (m+1)/2-th symbol signal outputted by the shift register and a lower part constituted by the output signal of the sampling counter;

an adder for combining the first data outputted by the first read-only memory and the second data output by the second read-only memory; and

a digital-to-analog converter for converting an output signal of the adder into a corresponding analog signal,

wherein "m" is equal to (a given symbol number ×

2)+1, the number of the selectors is equal to (m-1)/2, and the number of the first read-only memories is equal to the number of the selectors.

3. A Nyquist filter for digital modulation, comprising:

a signal converter for converting an input bit sequence into n-bit parallel symbol signals each representing one symbol, where "n" denotes a given natural number;

a shift register connected to the signal converter for storing an "m" number of the n-bit parallel symbol signals for shifting the n-bit parallel symbol signals one symbol by one symbol, and for outputting the n-bit parallel symbol signals, where "m" denotes a given odd natural number equal to or greater than 3;

a clock signal generator for generating a clock signal having a given frequency;

at least one selector for sequentially selecting one of the k-th symbol signal and the (m+1)-k-th symbol signal outputted by the shift register in response to the clock signal, where k equals 1, 2, . . . , (m-1)/2;

a sampling counter for counting pairs of successive clock pulses of the clock signal

an Exclusive-OR circuit for executing Exclusive-OR operation between the clock signal and an output signal of the sampling counter;

at least one first read-only memory for storing data representing portions of predetermined impulse response waveforms which do not cause intersymbol interference, and for outputting the data in response to an address signal having a higher part constituted by an output signal of the selector and a lower part constituted by an output signal of the Exclusive-OR circuit;

a second read-only memory for storing data representing portions of predetermined impulse response waveforms which do not cause intersymbol interference, and for outputting the data in response to an address signal having a higher part constituted by the (m+1)/2-th symbol signal outputted by the shift register and a lower part constituted by the output signal of the sampling counter;

an adder for combining the data outputted by the first read-only memory and the second read-only memory;

a digital-to-analog converter for converting an output signal of the adder into a corresponding analog signal;

a burst control shift register synchronized with the shift register for storing successive "m" bits of a burst control signal, for shifting the bits of the burst control signal one bit by one bit, and for outputting the "m" bits of the burst control signal in parallel;

at least one burst control selector for sequentially selecting one of the k-th bit and the (m+1)-k-th bit of the burst control signal outputted by the burst control shift register in response to the clock signal; and

a burst mask circuit for masking the output data of the first read-only memory and the second read-only memory in accordance with an output signal of the burst control selector and the (m+1)/2-th bit of the burst control signal outputted by the burst control shift register.

4. The Nyquist filter of claim 3, further comprising a burst rising/falling control circuit which is connected between the burst control shift register and the burst control selector and which includes:

at least one first AND gate for executing AND operation between the 1-st to the (j-1)-th bits and the j-th bit of the burst control signal outputted by the burst control shift register, where "j" denotes a given natural number and satisfies "1<

j≦

(m+1)/2";

means for using an output signal of the first AND gate as new 1-st to (j-1)-th bits of the burst control signal;

at least one second AND gate for executing AND operation between the {(m+2)-j}-th to the m-th bits and the {(m+1)-j}-th bit of the burst control signal outputted by the burst control shift register, where "j" denotes a given natural number and satisfies "1<

j≦

(m+1)/2"; and

means for using an output signal of the second AND gate as new {(m+2)-j}-th to m-th bits of the burst control signal.

5. A Nyquist filter for digital modulation, comprising:

a first ROM for storing data representing first portions of predetermined impulse response waveforms which do not cause intersymbol interference, wherein the predetermined impulse response waveforms have second portions and central portions different from the first portions thereof, and the first portions and the second portions of the predetermined impulse response waveforms are symmetrical with respect to the central portions thereof;

a second ROM for storing data representing the central portions of the predetermined impulse response waveforms;

first means for accessing the first ROM and the second ROM to read out the data from the first ROM and the second ROM in response to an input signal, and for generating first data according to the data read out from the first ROM and the second ROM, the first data representing first and central portions of impulse response waveforms corresponding to the input signal;

second means for accessing the first ROM to read out the data from the first ROM in response to the input signal, for generating second data on the basis of the data read out from the first ROM, the second data representing second portions of impulse response waveforms corresponding to the input signal; and

means for combining the first data generated by the first means and the second data generated by the second means,

wherein each of said first portions of the predetermined impulse response waveforms corresponds to one symbol of the input signal, add each of said central portions of the predetermined impulse response waveforms corresponds to another symbol of the input signal.