Selectively called radio receiver in which bit rate detection is controlled with a predetermined range

• US 5,487,090 A
• Filed: 10/12/1993
• Issued: 01/23/1996
• Est. Priority Date: 10/12/1992
• Status: Expired due to Fees

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Ide, Motoki
• Primary Examiner(s): TSE, YOUNG TOI
• Application Number:
  US08/134,683
• Time in Patent Office: 833 Days
• Field of Search: 375/316, 375/354, 375/365-366, 375/368, 370/84, 370/105.5, 370/106, 455/38.3, 455/343, 340/825.14, 340/825.44
• US Class Current: 375/316
• CPC Class Codes: H04W 88/022 Selective call receivers
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

In a selectively called radio receiver in which a demodulated signal of a specific bit rate is produced with battery saving kept in synchronism with the demodulated signal, a bit rate detecting unit detects the bit rate with a controllable sensitivity while the synchronism is lost. A bit rate detecting control arrangement controls the sensitivity within a predetermined sensitivity range. The bit rate detecting unit may misdetect the bit rate with a variable misdetection rate which is accumulated to an incremented amount from an initial amount representative of no misdetection while the synchronism is lost. The bit rate detection control arrangement may decrement the misdetection rate to the initial amount when the incremented amount reaches a predetermined amount. Alternatively, the bit rate detection control arrangement may control the misdetection rate between a greater and a smaller amount and then cause the misdetection rate to return to the initial amount. In either event, the bit rate detection control arrangement controls the sensitivity within a predetermined range.

Claims

1. A selectively called radio receiver including a receiving unit operable with battery saving to produce a demodulated signal having a specific bit rate, said radio receiver comprising:

a synchronizing unit for establishing and keeping synchronism between said demodulated signal and operation of said receiving unit;

a bit rate detecting unit for detecting said bit rate with a controllable sensitivity to assist operation of said synchronizing unit when said synchronizing unit fails to keep said synchronism; and

bit rate detection control means connected to said synchronizing and said bit rate detectiong units for controlling said sensitivity within a predetermined sensitivity range while said synchronizing unit fails to keep said synchronism.

2. A selectively called radio receiver as claimed in claim 1, wherein:

said bit rate detecting unit is given an ordinary sensitivity and a high sensitivity higher than said ordinary sensitivity by said predetermined sensitivity range;

said bit rate detection control means giving said ordinary sensitivity and said high sensitivity to said bit rate detecting unit while said synchronizing unit keeps and fails to keep said synchronism, respectively.

3. A selectively called radio receiver as claimed in claim 2, said demodulated signal comprising a plurality of serial batch streams, each batch stream comprising a preamble signal and a succession of batches following said preamble signal and including synchronization signals in said batches, respectively, one of said synchronization signals immediately following said preamble signal as an immediately following signal, wherein:

said synchronizing unit comprises a synchronism keeping subunit responsive to said preamble signal and to said immediately following signal for establishing and keeping said synchronism to produce an interruption signal with a first level and a synchronism detecting subunit connected to said synchronism keeping subunit for detecting at least one of said synchronization signals to find collapse of said synchronism and to thereby give a second level to said interruption signal;

said bit rate detection control means giving said high and said ordinary sensitivities to said bit rate detecting unit when said interruption signal is switched from said second level to said first level and from said first level to said second level, respectively.

4. A selectively called radio receiver as claimed in claim 3, one of said batches including in one of said batch streams a selective call signal, at least said one of batch streams comprising said at least one of the synchronization signals and a message signal following said selective call signal, wherein said synchronism detecting subunit detects said message signal unless said collapse of synchronism is detected.

5. A selectively called radio receiver as claimed in claim 4, each of said batches comprising in each of said batch streams one of said synchronization signals and a sequence of code words following sad one of the synchronization signals, a predetermined at least one of the code words of said sequence representing said selective call signal with said message signal represented by the code words following sid selective call signal, wherein:

said bit rate detection control means comprises a processor unit connected to said synchronism keeping and said synchronism detecting subunits for calculating an edge counter value to give an ordinary and a reduced count to said edge counter value when supplied with said interruption signal with said first and said second levels, respectively, and sensitivity control means connected to said bit rate detecting and said processor units for giving said high and said ordinary sensitivities to said bit rate detecting unit when said edge counter value is switched from said reduced count to said ordinary count and from said ordinary count to said reduced count, respectively;

said synchronism keeping subunit comprising a reference clock generator for generating reference clock pulses at said bit rate, a clock regenerator responsive to said reference clock pulses and to said synchronization signal and the code words of each batch of said batch streams for producing regenerated clock pulses in one-to-one correspondence to said reference clock pulses, and a synchronism keeping circuit responsive to said preamble signal, to said immediately following signal, and to said regenerated clock pulses for keeping said synchronism to give said first level to said interruption signal;

said bit rate detecting unit comprising;

a window generator connected to said reference clock generator and said clock regenerator for generating windows between said reference clock pulses and the regenerated clock pulses corresponding to said reference clock pulses;

an edge detector connected to said receiving unit and to said window generator for judging whether or not said demodulated signal has an edge in one of said windows, said edge detector producing an edge detection pulse when said edge is detected in said one of the windows;

an edge counter for counting up an edge count each time when said edge detection pulse is produced; and

a bit rate detecting subunit connected to said processor unit and to said edge counter for detecting said bit rate with said ordinary and said high sensitivities when said edge count is equal to said ordinary and said reduced counts, respectively.

6. A selectively called radio receiver as claimed in claim 1, wherein:

said bit rate detecting unit is liable to misdetect said bit rate with a variable misdetection rate while said synchronizing unit fails to keep said synchronism;

said bit rate detection control means controlling said sensitivity within said predetermined sensitivity range to keep said misdetection rate within a predetermined rate range.

7. A selectively called radio receiver as claimed in claim 6, wherein:

said bit rate detecting unit misdetects said bit rate to accumulate said misdetection rate to an incremented rate from an initial rate representative of no misdetection;

said bit rate detection control means decrementing said misdetection rate to said initial rate when said incremented rate reaches a predetermined rate.

8. A selectively called radio receiver as claimed in claim 6, wherein:

said bit rate detecting unit misdetects said bit rate to accumulate said misdetection rate to an incremented rate from an initial rate representative of no misdetection;

said bit rate detection control means controlling said misdetection rate between a first and a second predetermined rate when said incremented rate reaches said first predetermined rate, said first predetermined rate being greater than said second predetermined rate, said bit rate detection control means subsequently causing said misdetection rate return to said initial rate.