Transform processor system having reduced processing bandwith
First Claim
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1. A transform processor system comprising:
- an input circuit generating a driving function signal;
a memory storing a plurality of input points, each input point having a plurality of parameters;
a coefficient processor generating transform coefficients in response to the driving function signal;
a first transform processor coupled to the coefficient processor and to the memory and generating a first transformed point in response to a first one of the plurality of input points stored by the memory and in response to the transform coefficients;
a second transform processor coupled to the coefficient processor and to the memory and generating a second transformed point in response to a second one of the plurality of input points stored by the memory and in response to the same transform coefficients as used for the generation of the first transform point; and
an output circuit coupled to the first transform processor and to the second transform processor and generating transformed output signals in response to the first transformed point and the second transformed point.
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Abstract
An improved transform processing system reduces processing bandwidth with improved processor architectures and improved transform algorithms. A hierarchal arrangement facilitates use of the same coefficients for multiple transforms, particularly when the coefficients have not changed. A detector arrangement is provided for detecting a change condition and then causing the processor to bypass redundant processing operations.
260 Citations
72 Claims
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1. A transform processor system comprising:
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an input circuit generating a driving function signal; a memory storing a plurality of input points, each input point having a plurality of parameters; a coefficient processor generating transform coefficients in response to the driving function signal; a first transform processor coupled to the coefficient processor and to the memory and generating a first transformed point in response to a first one of the plurality of input points stored by the memory and in response to the transform coefficients; a second transform processor coupled to the coefficient processor and to the memory and generating a second transformed point in response to a second one of the plurality of input points stored by the memory and in response to the same transform coefficients as used for the generation of the first transform point; and an output circuit coupled to the first transform processor and to the second transform processor and generating transformed output signals in response to the first transformed point and the second transformed point. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A transform processor system comprising:
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an input circuit generating a driving function signal; a memory storing a plurality of input points, each input point having a plurality of parameters; a coefficient processor generating a plurality of coefficients in response to the driving function signal; a transform processor coupled to the coefficient processor and to the memory and generating a plurality of transformed points in response to the plurality of input points stored by the memory and in response to the same coefficients; and an output circuit coupled to the transform processor and generating transformed output signals in response to the plurality of transformed points. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A transform processor system comprising:
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an input circuit generating a driving function signal; a memory storing a plurality of input points, each input point having a plurality of parameters; a hierarchal coefficient processor generating hierarchal transform coefficients that are common to a plurality of input points in response to the driving function signal; a first transform processor coupled to the hierarchal coefficient processor and to the memory and generating a first transformed point in response to a first one of the plurality of input points stored by the memory and in response to the hierarchal transform coefficients; a second transform processor coupled to the hierarchal coefficient processor and to the memory and generating a second transformed point in response to a second one of the plurality of input points stored by the memory and in response to the same hierarchal transform coefficients as used for the generation of the first transform point; and an output circuit coupled to the first transform processor and to the second transform processor and generating transformed output signals in response to the first transformed point and the second transformed point. - View Dependent Claims (14, 15, 16, 17, 18)
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19. A transform processor system comprising:
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an input circuit generating a driving function signal; a memory storing a plurality of input points, each input point having a plurality of parameters; a hierarchal coefficient processor generating a plurality of hierarchal coefficients in response to the driving function signal; a transform processor coupled to the hierarchal coefficient processor and to the memory and generating a plurality of transformed points in response to the plurality of input points stored by the memory and in response to the same hierarchal coefficients; and an output circuit coupled to the transform processor and generating transformed output signals in response to the plurality of transformed points. - View Dependent Claims (20, 21, 22, 23, 24)
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25. A transform processor system comprising:
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a memory storing a plurality of input points, each input point having a plurality of parameters; an input circuit generating a first driving function signal related to a first one of the input points stored by the memory and a second driving function signal related to a second one of the input points stored by the memory; a first detector coupled to the input circuit and generating a first detector signal indicative of a change in the first driving function signal; a second detector coupled to the input circuit and generating a second detector signal indicative of a change in the second driving function signal; a first transform processor coupled to the first detector and to the memory and transforming the first one of the input points stored by the memory in response to the first detector signal; a second transform processor coupled to the second detector and to the memory and transforming the second one of the input points stored by the memory in response to the second detector signal; and an output circuit coupled to the first transform processor and to the second transform processor and generating transformed output signals in response to the first transformed point and the second transformed point. - View Dependent Claims (26, 27, 28)
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29. A transform processor system comprising:
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a memory storing a plurality of input points, each input point having a plurality of parameters; an input circuit generating driving function signals related to the input points stored by the memory; a plurality of detectors coupled to the input circuit and generating detector signals indicative of changes in the driving function signals; a transform processor coupled to the plurality of detectors and to the memory and transforming the input points stored by the memory in response to the detector signals; and an output circuit coupled to the transform processor and generating transformed output signals in response to the transformed points. - View Dependent Claims (30, 31, 32)
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33. A transform processor system comprising:
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a memory storing a plurality of input points, each input point having a plurality of parameters; an input circuit generating a first driving function signal related to a first one of the input points stored by the memory and a second driving function signal related to a second one of the input points stored by the memory; a first detector coupled to the input circuit and generating a first detector signal indicative of a change in the first driving function signal; a second detector coupled to the input circuit and generating a second detector signal indicative of a change in the second driving function signal; a first transform processor coupled to the first detector and to the memory and transforming the first one of the input points stored by the memory when the first detector signal is indicative of a change in the first driving function signal and bypassing transforming of the first one of the input points when the first detector signal is indicative of no change in the first driving function signal; a second transform processor coupled to the second detector and to the memory and transforming the second one of the input points stored by the memory when the second detector signal is indicative of a change in the second driving function signal and bypassing transforming of the second one of the input points when the second detector signal is indicative of no change in the second driving function signal; and an output circuit coupled to the first transform processor and to the second transform processor and generating transformed output signals in response to the first transformed point and the second transformed point. - View Dependent Claims (34, 35, 36)
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37. A transform processor system comprising:
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a memory storing a plurality of input points, each input point having a plurality of parameters; an input circuit generating driving function signals related to the input points stored by the memory; a plurality of detectors coupled to the input circuit and generating detector signals indicative of changes in the driving function signals; a transform processor coupled to the plurality of detectors and to the memory and transforming the input points stored by the memory when the detector signals are indicative of changes in the driving function signals and bypassing transforming of the input points when the detector signals are indicative of no change in the driving function signals; and an output circuit coupled to the transform processor and generating transformed output signals in response to the transformed points. - View Dependent Claims (38, 39, 40)
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41. A transform processor system comprising:
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a translation input circuit generating a translation driving function signal; a rotation input circuit generating a rotation driving function signal; and a transform processor coupled to the translation input device and to the rotation input device and generating transformed output signals in response to the translation driving function signal and in response to the rotation driving function signal, wherein the transform processor includes a) a memory storing a plurality of points each point having at least two coordinates, b) a coefficient processor generating a plurality of coefficients in response to the translation driving function signal and in response to the rotation driving function signal, c) a transform circuit coupled to the coefficient processor and to the memory and generating a plurality of transformed points in response to the plurality of points stored by the memory and in response to the same coefficients, and d) an output circuit coupled to the transform circuit and generating the transformed output signals in response to the plurality of transformed points. - View Dependent Claims (42, 43, 44)
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45. A transform processor system comprising:
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an input circuit generating a driving function signal; a memory storing a plurality of input points, each input point having a plurality of parameters; an object coefficient processor generating object transform coefficients that are common to a plurality of input points in response to the driving function signal; a first transform processor coupled to the object coefficient processor and to the memory and generating a first transformed point in response to a first one of the plurality of input points stored by the memory and in response to the object transform coefficients; a second transform processor coupled to the object coefficient processor and to the memory and generating a second transformed point in response to a second one of the plurality of input points stored by the memory and in response to the same object transform coefficients as used for the generation of the first transform point; and an output circuit coupled to the first transform processor and to the second transform processor and generating transformed output signals in response to the first transformed point and the second transformed point. - View Dependent Claims (46, 47, 48, 49, 50)
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51. A transform processor system comprising:
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an input circuit generating a driving function signal; a memory storing a plurality of input points, each input point having a plurality of parameters; an object coefficient processor generating a plurality of object coefficients in response to the driving function signal; a transform processor coupled to the object coefficient processor and to the memory and generating a plurality of transformed points in response to the plurality of input points stored by the memory and in response to the same object coefficients; and an output circuit coupled to the transform processor and generating transformed output signals in response to the plurality of transformed points. - View Dependent Claims (52, 53, 54, 55, 56)
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57. A transform processor system comprising:
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an input circuit generating a driving function signal; a memory storing a plurality of input points, each input point having a plurality of parameters; a surface coefficient processor generating surface transform coefficients that are common to a plurality of input points in response to the driving function signal; a first transform processor coupled to the surface coefficient processor and to the memory and generating a first transformed point in response to a first one of the plurality of input points stored by the memory and in response to the surface transform coefficients; a second transform processor coupled to the surface coefficient processor and to the memory and generating a second transformed point in response to a second one of the plurality of input points stored by the memory and in response to the same surface transform coefficients as used for the generation of the first transformed point; and an output circuit coupled to the first transform processor and to the second transform processor and generating transformed output signals in response to the first transformed point and the second transformed point. - View Dependent Claims (58, 59, 60, 61, 62)
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63. A transform processor system comprising:
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an input circuit generating a driving function signal; a memory storing a plurality of input points, each input point having a plurality of parameters; a surface coefficient processor generating a plurality of surface coefficients in response to the driving function signal; a transform processor coupled to the surface coefficient processor and to the memory and generating a plurality of transformed points in response to the plurality of input points stored by the memory and in response to the same surface coefficients; and an output circuit coupled to the transform processor and generating transformed output signals in response to the plurality of transformed points. - View Dependent Claims (64, 65, 66, 67, 68)
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69. In a transform processor system, a process comprising:
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generating a driving function signal; storing a plurality of input points, each input point having a plurality of parameters; generating a plurality of coefficients in response to the driving function signal; generating a plurality of transformed points in response to the plurality of stored input points and in response to the same coefficients; and generating transformed output signals in response to the plurality of transformed points.
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70. In a transform processor system, a process comprising:
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generating a driving function signal; storing a plurality of input points, each input point having a plurality of parameters; generating a plurality of hierarchal coefficients in response to the driving function signal; generating a plurality of transformed points in response to the plurality of input points and in response to the same hierarchal coefficients; and generating transformed output signals in response to the plurality of transformed points.
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71. In a transform processor system, a process comprising:
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storing a plurality of input points, each input point having a plurality of parameters; generating driving function signals related to the input points stored by the memory; generating detector signals indicative of changes in the driving function signals; transforming the input points in response to the detector signals; and generating transformed output signals in response to the transformed input points.
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72. In a transform processor system, a process comprising:
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storing a plurality of input points, each input point having a plurality of parameters; generating driving function signals related to the input points stored by the memory; generating detector signals indicative of changes in the driving function signals; transforming the input points when the detector signals are indicative of changes in the driving function signals and bypassing transforming of the input points when the detector signals are indicative of no change in the driving function signals; and
generating transformed output signals in response to the transformed input points.
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Specification