Low power architecture for portable and mobile two-way radios

• US 5,487,181 A
• Filed: 10/28/1992
• Issued: 01/23/1996
• Est. Priority Date: 10/28/1992
• Status: Expired due to Term

• Current Assignee: Blackberry Limited
• Original Assignee: Telefonaktiebolaget LM Ericsson
• Inventors: Croucher, Russell L., Dailey, Timothy E., Dissosway, Marc A.
• Primary Examiner(s): Pham, Chi H.
• Application Number:
  US07/969,739
• Time in Patent Office: 1,182 Days
• Field of Search: 455/38.3, 455/343, 455/89-90, 455/73, 455/76, 455/183.2, 455/127, 379/58, 345/89, 345/148, 370/110.2, 364/228.4-228.6, 364/230.2
• US Class Current: 455/90.2
• CPC Class Codes: H04B 1/40 Circuits

Abstract

An extremely compact, full featured portable radio architecture conserves power by allowing a processor to sleep except when it needs to perform tasks. A lower power processor which acts principally as an interrupt controller but which performs other functions as well (e.g., tone decode, synthesizer lock monitoring, etc.) so the main processor can sleep as much as possible and yet is assured of being awoken promptly when its processing power is required. The resulting portable radio has extremely low power consumption (e.g., on the order of 75 milliamperes during trunked mode operation)--thereby permitting even a relatively small battery pack to provide nearly 8 hours of continuous operation. The portable radio with battery is small and lightweight enough to fit into a front shirt pocket.

Claims

1. A battery powered portable radio transceiver comprising:

a housing;

an antenna mounted on said housing;

radio frequency circuitry, disposed within said housing and coupled to said antenna, for transceiving radio frequency signals over the air via said antenna, said radio frequency circuitry transmitting and receiving voice and data communications via an RF working channel and monitoring control signals on an RF control channel;

a processing device disposed within said housing, said processing device being switchable between an active mode and a software standby mode, said processing device performing tasks associated with said transceiving when in said active mode;

a controller, disposed within said housing, coupled to said radio frequency circuitry and connected to said processing device, said controller monitoring the RF control channel while the processing device is in the software standby mode and controlling said processing device to switch from said software standby mode to said active mode in response to at least one event associated with said transceiving; and

a battery removably coupled to said housing, said battery supplying power to said radio frequency circuitry, said processing device, and said controller,

wherein said housing including said radio frequency circuitry, processing device, and controller weighs about ten ounces or less, is not more than substantially four inches in length, and wherein current consumption is minimized in said standby mode.

2. A transceiver as in claim 1 wherein:

said transceiver further includes a clock generator that continuously applies a clock signal to said processing device; and

said controller does not disconnect said clock signal from said processing device in order to switch said processing device to said software standby mode.

3. A transceiver as in claim 1 wherein said radio frequency circuitry is for transmitting voice and data via both a trunked radio channel and a conventional non-trunked radio channel.

4. The transceiver in claim 1, wherein current is minimized to permit typical operation of said radio transceiver for at least a six hour shift without replacement of said battery.

5. A battery powered portable radio transceiver comprising:

a housing;

an antenna mounted on said housing;

radio frequency circuitry, disposed within said housing and coupled to said antenna, for transceiving radio frequency signals over the air via said antenna, said radio frequency circuitry transmitting and receiving voice and data communications via an RF working channel and monitoring control signals on an RF control channel;

a first programmable processing device disposed within said housing, said first programmable processing device having a first program store connected thereto, said first program store storing first program instructions, said first processing device having an active mode and a software standby mode, said first processing device executing said first program instructions to perform tasks associated with said transceiving when in said active mode;

a second processing device, disposed within said housing, coupled to said radio frequency circuitry and connected to said first programmable processing device, said second processing device monitoring the RF control channel in the software standby made and to control said first programmable processing device to switch from said software standby mode to said active mode in response to at least one event associated with said transceiving; and

a battery removably coupled to said housing, said battery supplying power to said radio frequency circuitry, said first programmable processing device, and said second processing device,

wherein said transceiver draws reduced current from said battery during the software standby mode as compared with current drawn from said battery in the active mode.

6. A transceiver as in claim 5 wherein said second processing device executes a tone decoding software program routine for detecting received signalling tones.

7. A transceiver as in claim 5 wherein:

said transceiver further includes a clock generator that continuously applies a clock signal to said first programmable processing device; and

said second processing device does not disconnect said clock signal from said first programmable processing device in order to switch said first processing device to said software standby mode.

8. A transceiver as in claim 5 wherein said radio frequency circuitry is for transmitting voice and data via both a trunked radio channel and a conventional non-trunked radio channel.

9. A radio transceiver comprising:

radio frequency circuitry for transceiving radio frequency signals over the air;

a processing device having first and second interrupt inputs, said processing device having an active state and a reduced power state, said processing device switching from said reduced power state to said active state in response to receipt of an interrupt signal received on said first interrupt input, said processing device performing at least one operation associated with said transceiving when in said active state, said processing device interrupting said operation and responding to an interrupt signal received on said second interrupt input when operating in said active state, said processing device sending a signal specifying whether a next interrupt signal should be applied to said first interrupt input or to said second interrupt input; and

an interrupt controller coupled to said radio frequency circuitry and connected to said first and second interrupt inputs, said interrupt controller receiving said specifying signal from said processing device, said interrupt controller responding to at least one event associated with said transceiving by applying an interrupt signal to said processing device, said interrupt controller applying said interrupt signal to first interrupt input or to said second interrupt input based on said received specifying signal.

10. A radio transceiver as in claim 9 wherein said first interrupt input is non-maskable.

11. A radio transceiver as in claim 9 wherein said transceiver further includes:

a serial port coupled to said processing device; and

a further processing device also coupled to said serial port, said further processing device detecting incoming data on said serial port and informing said first-mentioned processing device of the results of detection.

12. A radio transceiver as in claim 11 wherein said further processing device is coupled to said interrupt controller and causes said interrupt controller to generate said interrupt signal in response to said incoming data detection.

13. A radio transceiver as in claim 9, further including:

means coupled to said processing device for automatically determining a parameter associated with the configuration of said transceiver.

14. A radio transceiver as in claim 13 wherein said parameter determining means includes an analog-to-digital converter connected to a voltage divider.

15. A radio transceiver as in claim 9, wherein said interrupt controller provides at least one time related parameter, and said processing device uses said time related parameter to update at least one timing parameter associated with said processing device upon switching from said reduced power state to said active state.

16. A radio transceiver comprising:

radio frequency circuitry for transceiving radio frequency signals over the air;

a processing device having first and second interrupt inputs, said processing device switching between an active state and a reduced power state in response to receipt of a first interrupt signal applied to said first interrupt input, said processing device responding to a second interrupt signal received on said second interrupt input when operating in said active state; and

an interrupt controller coupled to said radio frequency circuitry and connected to said processing device first and second interrupt inputs, said interrupt controller selectively applying said first interrupt signal to said processing device first interrupt input depending on said state of said processing device in response to at least one event associated with said transceiving,

wherein said interrupt controller applies said first interrupt signal to said first interrupt input when said processing device operates in said reduced power state, and applies said second interrupt signal to said second interrupt input during operation of said processing device in said active state.

17. A radio transceiver comprising:

radio frequency circuitry for transceiving radio frequency signals over the air;

a processing device having first and second interrupt inputs, said processing device switching between an active state and a reduced power state in response to receipt of a first interrupt signal applied to said first interrupt input, said processing device responding to a second interrupt signal received on said second interrupt input when operating in said active state; and

an interrupt controller coupled to said radio frequency circuitry and connected to said processing device first and second interrupt inputs, said interrupt controller selectively applying said first interrupt signal to said processing device first interrupt input depending on said state of said processing device in response to at least one event associated with said transceiving,

wherein said transceiver further includes;

a frequency synthesizer having an output connected to said radio frequency circuitry, said output controlling the operating frequency of said transceiving, and

a further processing device coupled to said radio frequency circuitry, said further processing device detecting when said frequency synthesizer output is unstable and informing said first-mentioned processing device of the results of detection.

18. A radio transceiver as in claim 17 wherein said further processing device prompts said interrupt controller to generate said second interrupt signal in response to detection that said frequency synthesizer output is unstable.

19. A radio transceiver comprising:

radio frequency circuitry for transceiving radio frequency signals over the air;

a processing device having first and second interrupt inputs, said processing device switching between an active state and a reduced power state in response to receipt of a first interrupt signal applied to said first interrupt input, said processing device responding to a second interrupt signal received on said second interrupt input when operating in said active state; and

an interrupt controller coupled to said radio frequency circuitry and connected to said processing device first and second interrupt inputs, said interrupt controller selectively applying said first interrupt signal to said processing device first interrupt input depending on said state of said processing device in response to at least one event associated with said transceiving,

wherein said transceiver further includes;

a further processing device coupled to said radio frequency circuitry and to said interrupt controller; and

a shared memory for communicating messages bidirectionally between said first-mentioned processing device and said further processing device via said interrupt controller.

20. A radio transceiver as in claim 19 wherein said shared memory comprises a dual port random access memory located in said further processing device.

21. A radio transceiver comprising:

radio frequency circuitry for transceiving radio frequency signals over the air via an antenna on RF channels;

a first processing device programmable with a high level programming language and having a first program memory storing first high level program instructions, said first processing device being capable of switching between an active state and a reduced power software standby state in response to receipt of an interrupt signal, said first processing device executing said first high level program instructions; and

a second programmable processing device coupled to said radio frequency circuitry and said first processing device, said second programmable processing device having a second program memory storing second program instructions, said second programmable processing device executing said second program instructions to monitor control signals on one of the RF channels in the software standby state and to control said first processing device to switch from said software standby state to said active state in response to at least one transceiving event by generating the interrupt signal;

said transceiver being powered by a battery, said transceiver and battery together weighing less than twenty ounces and being small enough to fit into a front shirt pocket of a user of the radio transceiver.

22. A radio transceiver comprising:

radio frequency circuitry for transceiving radio frequency signals over the air;

a processing device having first and second interrupt inputs, said processing device switching between an active state and a reduced power state in response to receipt of a first interrupt signal applied to said first interrupt input, said processing device responding to a second interrupt signal received on said second interrupt input when operating in said active state; and

an interrupt controller coupled to said radio frequency circuitry and connected to said processing device first and second interrupt inputs, said interrupt controller selectively applying said first interrupt signal to said processing device first interrupt input depending on said state of said processing device in response to at least one event associated with said transceiving,

wherein said transceiver further includes a further programmable processing device coupled to said radio frequency circuitry, said programmable processing device executing stored instructions to simultaneously detect first and second different received tone signalling and inform said processing device of results of detection.

23. A radio transceiver comprising:

radio frequency circuitry for transceiving radio frequency signals over the air;

a processing device having first and second interrupt inputs, said processing device switching between an active state and a reduced power state in response to receipt of a first interrupt signal applied to said first, interrupt input, said processing device responding to a second interrupt signal received on said second interrupt input when operating in said active state; and

an interrupt controller coupled to said radio frequency circuitry and connected to said processing device first and second interrupt inputs, said interrupt controller selectively applying said first interrupt signal to said processing device first interrupt input depending on said state of said processing device in response to at least one event associated with said transceiving,

wherein said transceiver further includes a software programmable processing device coupled to said radio frequency circuitry, said software programmable processing device executing stored instructions to simultaneously detect channel guard and T99 received tone signalling and inform said processing device of the results of detection.

24. A radio transceiver comprising:

radio frequency circuitry for transceiving radio frequency signals over the air;

a processing device having first and second interrupt inputs, said processing device switching between an active state and a reduced power state in response to receipt of a first interrupt signal applied to said first interrupt input, said processing device responding to a second interrupt signal received on said second interrupt input when operating in said active state; and

an interrupt controller coupled to said radio frequency circuitry and connected to said processing device first and second interrupt inputs, said interrupt controller selectively applying said first interrupt signal to said processing device first interrupt input depending on said state of said processing device in response to at least one event associated with said transceiving, wherein said transceiver further includes;

a display having a backlight; and

pulse width modulating means coupled to said backlight for applying, to said backlight, a signal having a programmable duty cycle, wherein said duty cycle is increased or decreased depending on whether said processing device is in said active or reduced power state.

25. A radio transceiver comprising:

radio frequency circuitry for transceiving radio frequency signals over the air;

a processing device having first and second interrupt inputs, said processing device of switching between an active state and a reduced power state in response to receipt of a first interrupt signal applied to said first interrupt input, said processing device responding to a second interrupt signal received on said second interrupt input when operating in said active state; and

an interrupt controller coupled to said radio frequency circuitry and connected to said processing device first and second interrupt inputs, said interrupt controller selectively applying said first interrupt signal to said processing device first interrupt input depending on said state of said processing device in response to at least one event associated with said transceiving,

wherein said transceiver passes digital signals over a radio frequency channel, and further includes a data buffer coupled to said radio frequency circuitry and to said interrupt controller, said data buffer temporarily storing said digital signals, said interrupt controller generating an interrupt signal in response to a parameter related to the contents of said buffer.

26. A radio transceiver as in claim 25 wherein said parameter indicates whether said buffer is full.

27. A radio transceiver as in claim 25 wherein said parameter indicates whether said buffer is empty.

28. A radio transceiver as in claim 25 wherein said parameter indicates whether said buffer contains data that matches predetermined data.

29. A radio transceiver as in claim 25 wherein said parameter indicates whether said buffer contains a complete frame of data.

30. A radio transceiver comprising:

radio frequency circuitry for receiving and transmitting radio frequency signals;

a clock signal generator that generates a clock signal;

a first computing device including an arrangement that controls said first computing device to switch between an active state and a reduced power state in response to a control signal, said first computing device being connected to receive said clock signal generated by said clock signal generator;

a second computing device coupled to the radio frequency circuitry, performing at least one task related to said receiving and transmitting while said first computing device is in said reduced power state; and

control logic circuitry connected to said first and second processing devices and responsive to a signal from the second computing device for applying said control signal to said first computing device so as to cause said first computing device to begin operating in said active state.

31. The radio transceiver of claim 30, wherein said control logic circuitry permits said clock signal to continue to be applied to said first computing device.

32. Within a radio transceiver having radio receiving circuitry receiving RF signals, radio transmitting circuitry transmitting RF signals, and modulating/detecting means for allowing either voice or data communications to be transmitted and received over a radio frequency channel, a current saving control architecture comprising:

a high power programmable processor having a software standby mode and an active mode, said high power processor performing tasks associated with said transmitting and receiving, said high power processor switching from said software standby mode to said active mode in response to receipt of a control signal; and

further logic circuitry external to said high power processor, said further logic circuitry generating said control signal upon occurrence of an event associated with said transmitting and receiving,

wherein said high power processor is programmed to switch from said active mode to said software standby mode only when;

(a) said high power programmable processor has no current tasks to perform, and (b) said high power programmable processor is not scheduled to perform any tasks until at least a minimum predetermined time period has elapsed.

33. A radio transceiver as in claim 32 wherein said control signal is applied to an interrupt input of said high programmable power processor.

34. A radio transceiver as in claim 32 wherein said further logic circuitry includes a low power processor and an interrupt controller external to said low power processor, said low power processor substantially simultaneously performing channel guard and T99 signalling detection.

35. A radio transceiver as in claim 32 wherein said further logic circuitry includes at least one real time timer, and said high power programmable processor uses said real time timer to update time parameters upon switching from said software standby mode to said active mode.