Electronic system and method for remote identification of coded articles and the like

• US 5,491,482 A
• Filed: 12/29/1992
• Issued: 02/13/1996
• Est. Priority Date: 12/29/1992
• Status: Expired due to Term

• Current Assignee: Sarnoff Corporation (SRI International, Inc.)
• Original Assignee: David Sarnoff Research Center, Inc.
• Inventors: Schepps, Jonathan L., Dingwall, Andrew G. F.
• Primary Examiner(s): Hellner, Mark
• Application Number:
  US07/998,164
• Time in Patent Office: 1,141 Days
• Field of Search: 342/42, 342/44
• US Class Current: 342/42
• CPC Class Codes: G01S 13/76 wherein pulse-type signals are transmitted
• CPC Class Codes: G01S 13/765 with exchange of information between interrogator and responder
• CPC Class Codes: G01S 13/767 Responders; Transponders teaching or practice apparatus for gun-aiming or gun-laying using reflecting targets or active targets F41G3/26
• CPC Class Codes: G01S 13/78 discriminating between different kinds of targets, e.g. IFF-radar, i.e. identification of friend or foe G01S13/75, G01S13/79 take precedence
• CPC Class Codes: G07C 9/28 the pass enabling tracking or indicating presence

Abstract

There is described an electronic interrogation and identification (I/I) system in which an interrogator/reader (I/R) unit operates remotely using a microwave beam in conjunction with one or more coded articles. The articles are identified by a unique method and search sequence. As the I/R unit interrogates the articles, one or more of them respond to the I/R unit whenever a code word (data value) sent from the I/R unit matches a code word stored in one or more of the memory positions within the articles. After searching through all of the possible code words and word positions the I/R unit will have identified at least one code word stored in each of the word positions of at least one article. Then combinations of the just-identified code words are matched with the respective stored words of the various articles. After being uniquely identified each article is "powered-down" on command from the I/R unit and remains inactive so that one-by-one all remaining articles are also identified.

Claims

1. Apparatus for interrogating/identifying coded articles comprising:

an interrogator/reader (I/R) unit for transmitting at a suitable frequency to the articles a stream of binary bits of instruction and data words and for receiving responses from each article; and

a plurality of coded articles, each of the articles having electronic circuitry for storing as digital bits an identifying code number, the circuitry having means for detecting and demodulating the incoming bit stream from the I/R unit, and for generating clock and timing signals slaved to the bit stream for framing the incoming digital words, the circuitry having logic means for responding internally to the instruction and data words of the bit stream and for responding externally to the I/R unit at selected times such that the code number of an article is uniquely identified and that article alone among many communicates solely with the I/R unit when so identified.

2. The apparatus of claim 1 wherein the circuitry of each article comprises means for holding the circuitry in quiescent state until the article receives a sufficiently strong signal from the I/R unit, and further receives a reset instruction whereupon the circuitry is enabled to an active state.

3. The apparatus of claim 1 wherein the circuitry of an article further comprises means for putting the circuitry in a powerdown condition on receipt of a suitable command from the I/R unit such that the article, after being identified, no longer responds to the I/R unit.

4. Apparatus for interrogating/identifying coded articles comprising:

an interrogator/reader (I/R) unit for transmitting at a suitable frequency to the articles a stream of binary bits of instruction and data words and for receiving responses from each article; and

a plurality of coded articles, each of the articles having electronic circuitry for storing as digital bits an identifying code number, the circuitry having means for detecting and demodulating the incoming bit stream from the I/R unit, and for generating clock and timing signals slaved to the bit stream for framing the incoming digital words, the circuitry having logic means for responding internally to the instruction and data words of the bit stream and for responding externally to the I/R unit at selected times such that the code number of an article is uniquely identified and that article alone among many communicates solely with the I/R unit when so identified,

wherein the I/R unit transmits a short burst of a microwave carrier signal to represent a binary "0", a longer burst of the carrier to represent a binary "1", and an extended burst of the carrier to represent a binary "1" and to provide the means whereby the article can respond to the I/R unit.

5. The apparatus of claim 4 wherein the I/R unit transmits a reset instruction word in the form of a plurality of consecutive binary "1'"'"'s", and no other instruction and data word has as many consecutive binary "1'"'"'s".

6. The apparatus of claim 5 wherein each article has an RF antenna, and at selected times, during an extended "1" bit, the article is enabled to modulate the impedance of its respective antenna to effect a reflected response to the I/R unit.

7. A system for simultaneously and remotely interrogating/identifying coded articles comprising:

an interrogator/reader (I/R) unit for transmitting at a suitable frequency to the articles a stream of binary bits of instruction and data words and for receiving responses from the article all together or separately; and

a plurality of coded articles, each of the articles having circuitry for storing as digital bits an identifying code number as code word fragments in a plurality of memory positions, the circuitry of each article having means for detecting and demodulating the incoming bit stream from the I/R unit, and for generating clock and timing signals slaved to the bit stream for framing the incoming digital words, the circuitry having logic means for responding internally to the instruction and data words of the bit stream and for responding externally to the I/R unit at selected times as the code word fragments are identified such that when all of its code word fragments have been identified the code number of an article is uniquely identified and that article alone among many communicates solely with the I/R unit when so identified.

8. Apparatus for remote identification of coded articles comprising:

a transmit unit for transmitting to the articles a stream of binary bits of instruction and data words and for receiving responses from the articles together or separately on command; and

an electronic circuit for each article comprising;

an input block for detecting and decoding an incoming bit stream from the transmit unit, and for applying to other portions of the circuit digital data bits and clock signals slaved to the incoming bit stream;

a reset wake-up block connected to the input block for receiving a reset command and for activating other portions of the circuit when the article comes within range of the transmit unit and for returning the circuit to a quiescent state in which it draws very little current when outside the range of the transmit unit;

a control logic data memory register (CLDMR) block connected to the input and reset blocks for responding to the instructions and data from the transmit unit to identify coded information stored within the electronic circuit; and

a modulator block connected to the CLDMR block for sending a signal back to the transmit unit as the coded information is identified such that a plurality of the articles can be simultaneously detected and each one uniquely identified as to its respective coded information.

13. The apparatus of claim 8 wherein the transmit unit transmits the instruction and data words as 6-bit words, the coded information stored within the electronic circuit of each article being in the form of six 6-bit words, the reset command being six "1'"'"'s", the reset command always being followed by a word with a "0" as the least significant bit.

14. The apparatus of claim 8 wherein the input block generates a clock pulse which occurs after a binary "0", but during a binary "1", such that portions of the electronic circuit easily differentiate between "0'"'"'s" and "1'"'"'s", and the reset block after a reset command generates a synchronizing pulse such that the incoming digital words are properly framed.

15. The apparatus of claim 8 wherein the transmit unit transmits a microwave frequency beam with a short burst representing a binary "0", a longer burst representing a binary "1", and an extended burst representing a binary "1" and also providing microwave energy for response by the circuit, and the circuit further includes an antenna for receiving the beam, the modulator block modulating the impedance of the antenna to signal the transmit unit during an extended "1".

9. Apparatus for remote identification of coded articles comprising:

a transmit unit for transmitting to the articles a stream of binary bits of instruction and data words and for receiving responses from the articles together or separately on command; and

an electronic circuit for each article comprising;

an input block for detecting and decoding an incoming bit stream from the transmit unit, and for applying to other portions of the circuit digital data bits and clock signals slaved to the incoming bit stream;

a reset wake-up block connected to the input block for receiving a reset command and for activating other portions of the circuit when the article comes within range of the transmit unit and for returning the circuit to a quiescent state in which it draws very little current when outside the range of the transmit unit;

a control logic data memory register (CLDMR) block connected to the input and reset blocks for responding to the instructions and data from the transmit unit to identify coded information stored within the electronic circuit; and

a modulator block connected to the CLDMR block for sending a signal back to the transmit unit as the coded information is identified such that a plurality of the articles can be simultaneously detected and each one uniquely identified as to its respective coded information,

wherein the transmit unit transmits a short burst of an RF carrier signal to represent a binary "0", a longer burst to represent a binary "1", and an extended burst to represent a binary "1" and to provide the RF energy enabling each article to respond.

10. The apparatus of claim 9 in which the reset command comprises a plurality of consecutive binary "1'"'"'s", and no other instruction and data word from the transmit unit contains as many consecutive "1'"'"'s".

11. The apparatus of claim 10 wherein each article contains an internal power source in the form of a battery, the circuit being so configured such that during quiescent and active states thereof there is dissipated relatively low amounts of power and the operating life of the battery approaches its shelf life.

12. The apparatus of claim 11 wherein the reset block on command when coded information is identified places the circuit in powerdown condition in which the circuit no longer responds to the RF unit until the article is removed from range whereupon the reset block returns the circuit to quiescent state, such that battery power is further conserved once coded information is identified and other articles still responding to the RF unit are subsequently one-by-one put in powerdown condition as their respective coded information is identified, and all articles are rapidly and efficiently identified.

16. A circuit for storing coded information in the form of binary words and for sending signals in response to interrogating binary word signals regarding the information comprising:

an input unit for receiving the interrogating signals and for generating binary pulses in the form of "0'"'"'s" and "1'"'"'s" and clock pulses having a timed relation to the "0'"'"'s" and "1'"'"'s";

a reset unit connected to the input unit for enabling portions of the circuit to active state upon receipt of a reset instruction of the interrogating signals and for returning the circuit to a quiescent state when there is no interrogating signal;

an instruction latch unit connected to the input unit for receiving instruction words of the interrogating signals;

a data latch unit connected to the input unit for receiving data words of the interrogating signals;

an instruction decoder unit connected to the instruction latch unit for receiving and decoding instruction words;

a memory comparator controlled by the instruction decoder unit for receiving data words and for comparing them with coded word information stored in memory positions;

a modulate decoder unit connected to the instruction decoder unit and the memory comparator unit for tabulating the comparison of data words with stored coded word information; and

signal response means controlled by the modulate decoder unit for generating response signals when data words are matched with the stored coded word information.

17. The circuit of claim 16 wherein the reset unit on receipt of a reset instruction generates a synchronizing signal for framing the binary "0'"'"'s" and "1'"'"'s" into proper words.

18. The circuit of claim 17 wherein the reset unit, on receipt of a "powerdown" instruction of the interrogating signal, places portions of the circuit in a powerdown state in which the circuit no longer sends response signals, the reset unit returning the circuit to quiescent state when there is no interrogating signal.

19. The circuit of claim 17 wherein the reset unit only responds to a number of consecutive binary "1'"'"'s" equal to or more in number than a pre-determined member of "1'"'"'s", all other instruction and data words having fewer consecutive "1s".

20. The circuit of claim 16 wherein the binary pulses generated by the input unit comprise respectively a short pulse representing a binary "0", a long pulse representing a binary "1", the clock pulses being generated occurring after a binary "0" and during a binary "1".

21. An electronically coded article having a support, an antenna, and an electronic circuit, the circuit comprising:

an input detector/demodulator connected to the antenna for detecting incoming signals wherein a short burst of signal represents a binary "0", a longer burst represents a binary "1", and an extended burst represents a binary "1" and also provides RF energy for a response signal, the detector/demodulator generating binary "0" and "1" pulses and clock pulses in accordance with the digital signals;

memory means for storing coded information as a plurality of digital words;

logic and control means for receiving the binary "0'"'"'s" and "1'"'"'s" and clock pulses from the detector/demodulator and for comparing the binary pulses in sequence with the coded words stored in the memory means and for determining when the stored words have been matched to data sent by the RF signal; and

signalling means controlled by the logic and control means for modulating the antenna during extended "1" signals to generate response signals as data is matched to stored words.

22. An electronically coded article comprising:

an insulating support;

an RF antenna mounted on the support;

a battery mounted on the support; and

an electronic circuit mounted on the support and being connected to the antenna and battery, the circuit comprising;

an input detector/demodulator (D/D) for detecting incoming signals wherein a short duration burst of the RF signal represents a binary "0", and a longer burst represents a binary "1", the detector/demodulator generating binary "0" and "1" bit pulses and clock pulses slaved to the signals;

memory means for storing digital bit information as a plurality of coded words;

logic and control means for receiving the binary bit and clock pulses from the D/D and for comparing the binary bit pulses with the coded words stored in the memory means;

reset means connected to the D/D for placing the circuit in quiescent state in the absence of an RF signal and for enabling the circuit to active state on receipt of a reset instruction; and

signalling means connected to the logic and control means for generating a response signal when the stored coded words match with respective binary bit pulses.

23. The article of claim 22 wherein the reset means further puts the circuit in a powerdown state in which the signalling means is no longer active after signalling that the stored coded words and binary bit pulses have been matched.

24. The article of claim 22 wherein the signalling means, in generating a response signal, modulates the impedance of the antenna during a suitably timed burst of the RF signal.

25. The article of claim 22 further combination with:

a plurality of identical articles each of which contains unique identifying information in its stored coded words; and

an interrogator/reader (I/R) unit for transmitting signals to interrogate all of the articles simultaneously by means of instruction and data words and to uniquely identify each article by the response signals from the articles.

26. The article of claim 25 wherein the I/R unit transmits a microwave frequency beam with a short burst of the beam representing binary "0", a longer burst representing a binary "1" and an extended burst representing a binary "1" and also providing microwave energy for each article in generating a response signal.

27. The article of claim 25 wherein the I/R unit transmits a unique sequence of binary "1'"'"'s" to instruct the reset means of an article to activate its respective circuit, and transmits a unique sequence of "0'"'"'s" and "1'"'"'s" to instruct the reset means to powerdown the circuit such that all of the articles are collectively instructed and each is individually put in powerdown state.

28. The article of claim 25 in which the I/R unit simultaneously receives signals from any and all of the articles and iteratively transmits instruction and data words to the articles to uniquely identify the information in each one.

29. The article of claim 28 in which the instruction and data words are in the form of 6-bit words, and the coded information in each article is stored as six 6-bit words.

30. The article of claim 22 wherein the input of D/D comprises a first pair of metal oxide semiconductor (MOS) transistors connected as a common-gate source-driven amplifier, and a second pair of MOS transistors supplying the first pair of MOS transistors with constant currents, the currents being unbalanced, a source of the first pair of MOS transistors being connected to the antenna such that the input stage is highly sensitive to microwave signals and draws extremely low current from the battery.

31. The article of claim 22 wherein the coded words stored in the memory means may be re-written by a proper sequence of signals such that all articles are identical as manufactured and each is uniquely identified by electronically written and stored code words.

32. The article of claim 26 wherein the I/R unit has separate transmit and receiving antennas and a quadrature homodyne arrangement connected to the receiving antenna such that phase differences in the received signals from the articles are minimized.

33. The article of claim 31 wherein the I/R unit has an RF switch which applies bursts of low microwave frequency power to the transmit antenna in accordance with the instruction and data words transmitted to the articles.

34. The article of claim 33 in which the transmit antenna of the I/R unit transmits a burst of a directional microwave beam lasting about 250 nanoseconds to represent a binary "0", a burst of about 2 microseconds to represent a binary "1", and an extended burst lasting much longer than 2 microseconds to represent a binary "1" and to provide power to each article in responding to the interrogator/reader unit with a signal received by the receive antenna.

35. The article of claim 34 wherein a binary "1" represents approximately a 50% duty cycle of the microwave beam such that the binary "1'"'"'s" of a reset instruction are uniquely and accurately distinguishable from other signals.

36. The article of claim 35 in which the I/R unit always transmits a binary "0" as a first bit following a reset instruction such that false operation of an article is precluded an words are properly framed.

37. An electronic circuit for a coded article comprising:

an input detector/demodulator (D/D) for detecting incoming digital word signals, the input D/D having a first pair of metal oxide semiconductor (MOS) transistors connected as a common-gate source-driven amplifier, the source of one of the transistors being connected to an input for the signal, the D/D also having a second pair of MOS transistors supplying the first pair of MOS transistors with substantially constant currents which are unequal, the D/D generating binary "0" and "1" pulses corresponding to the digital word signals;

memory means for storing coded information as a plurality of digital words;

logic and control means connected to the D/D and memory means for comparing digital words from the signal with the words stored in the memory means; and

signalling means connected to the logic and control means for generating a response signal when the digital words of the signals and the stored words match.

38. The circuit of claim 37 further combination with reset means for placing the circuit in a quiescent state in the absence of an incoming signal, for placing the circuit in an active state in the presence of the signal, and for placing the circuit in a powerdown inactive state when the digital words of the signals and the stored words match, the reset means automatically returning the circuit to quiescent state in the absence of the signal.

39. The circuit of claim 37 in which the D/D also generates clock pulses in timed relation to the binary "0" and "1" pulses, a clock pulse occurring after a binary "0" and during a binary "1".

40. The circuit of claim 38 wherein the reset means when placing the circuit in an active state also generates a synchronizing pulse for accurate framing of the binary "0" and "1" pulses into digital words corresponding to the digital word signals.

41. The circuit of claim 37 wherein the D/D has current switching means for applying additional current at timed intervals to one of the first pair of MOS transistors, the current switching means being controlled by the binary "0" and "1" pulses, such that input efficiency of the D/D is enhanced.

42. A method of interrogating and identifying electronically coded articles comprising the steps of:

storing coded information in the article in the form of a plurality of stored digital word fragments;

interrogating an article or articles by means of sequential digital instructions and data words on all possible combinations of stored words;

responding by each article when a match between a data word and a stored word occurs;

determining that at least one article has a matched data and stored word in all of the word fragments of its coded information;

sorting through the possible combinations of matched word fragments in all of the articles which have responded; and

identifying the articles one-by-one, each with its unique stored word fragments until all of the articles are identified.

43. The method of claim 42 further comprising the step of instructing an article once all of its stored word fragments have been identified not to respond while the other articles are still being identified.

44. A method of remotely interrogating and identifying articles in which a plurality of coded digital words are electronically stored comprising the steps of:

transmitting a bit stream of instruction and data words to each and all articles present to determine the presence of at least one article;

sequentially sorting through all possible combinations of values of the plurality of coded words stored in each and all articles;

tabulating the matches found between transmitted and stored words of each and all articles and responding by the article when a match is found;

determining that at least one article has matches with all of its stored words;

transmitting instruction and data words to the articles to sort out all possible combinations of matched words in all of the articles which have responded; and

responding by the articles one-by-one when each is uniquely identified.

45. The method of claim 44 in which, when the presence of an article or articles is determined, the article or articles are activated from a quiescent state to an active reset state in which they are enabled to respond, and when an article is uniquely identified, it is instructed to go into an inactive powerdown state in which it no longer responds while any remaining articles are being identified.

46. A search sequence for identifying articles having coded information in the form of a plurality of stored data words, the sequence comprising:

a first pass to determine if an article is present and if so sequencing through all possible combinations of data values of each of the plurality of data words stored in the article or articles and tabulating each match between a possible data value and an actual stored word; and

a second pass in which the possible combinations at the tabulated matches of the stored words in all the articles are sequentially sorted through, and each article is uniquely identified and set aside one-by-one until all of the articles are identified.

47. A method of remotely interrogating and uniquely identifying a number of articles in which coded information is electronically stored in the form of a plurality of digital words comprising the steps of:

transmitting signals in the form of a bit stream of instruction and data words to determine whether an article or articles are present within the range of the signals and if present instructing each article to wake-up from a quiescent state to an active state and to generate a signal response;

tabulating the matches found between transmitted and stored words of each and all articles and activating the articles to respond when matches are found;

determining that at least one article has matches with all of its stored words;

transmitting instruction and data words to the articles to try all possible combinations of matched words in all of the articles and instructing the articles to respond as combinations of matches are found; and

communicating exclusively with each article after all of its stored words are uniquely identified and thereafter placing the article in inactive state in which it no longer responds to the instruction and data words while other articles are being identified.

48. The method of claim 47 in which the stored words are in the form of six 6-bit words, and the instruction and data words are each of 6 bits.

49. The method of claim 48 in which the instruction and data words are in the form given in Table 1.

50. The method of claim 47 wherein the most significant bit of certain instructions is an extended burst of the sisal representing a binary "1" and also providing RF energy to enable the articles in signalling a response.

51. The method of claim 47 wherein the articles are activated by a reset instruction in the form of a plurality of binary "1'"'"'s", no other instruction or data word having as many "1'"'"'s".

52. The method of claim 47 wherein the step of communicating exclusively with an article includes instructing the article to powerdown to inactive state so long as the article remains within range of the signals, the article automatically returning itself to a quiescent state when removed from the signal.

53. The method of claim 50 wherein each article is provided with its own internal battery and contains an antenna, the article generating a response signal by modulating the impedance of the antenna during an extended "1" burst of the signal.

54. The method of claim 53 wherein each article contains a CMOS integrated circuit which responds to the signals in accordance with the transmitted instruction and data words, each article having its coded information electronically written into a plurality of memory word positions such that the power consumed by the article is low.

55. Apparatus for interrogating and identifying coded articles comprising:

an interrogator/reader (I/R) unit for transmitting at a suitable frequency within a wide range of frequencies to the articles a stream of binary "0'"'"'s" and "1'"'"'s" of instruction and data words and for receiving responses from each article; and

a plurality of coded articles, each of the articles having circuitry for storing as digital bits coded information including an identifying code number, the electronic circuitry of each article having means for detecting and demodulating the incoming bit stream from the interrogator/reader unit, and for generating clock and timing signals slaved to the bit stream for framing the incoming digital words, the circuitry having logic means for responding internally to the instruction and data words of the bit stream and for responding externally to the I/R unit at selected times such that the code number of an article is uniquely identified and that article alone among many communicates solely with the interrogator/reader unit when so identified.

56. The apparatus of claim 55 wherein the I/R unit transmits a selected sequence of commands to rewrite at least a portion of the coded information in a given article such that the information in each article is remotely reprogrammable.

57. The apparatus of claim 55 wherein each article has a single input/output connection for receiving instruction and data words from the I/R and for responding to the interrogator/reader at selected times.

58. The apparatus of claim 55 the binary "0" and "1" bits have substantially different time durations.

59. The apparatus of claim 58 wherein the binary "0" bits have a much shorter duration than the binary "1" bits, the clock signals generated by each article occurring after a binary "0" but during a binary "1".