Substrate subassembly and method of making transistor switch module
First Claim
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1. The method of making a high power semiconductor substrate subassembly comprising the steps of:
- providing a ceramic wafer having opposed major surfaces;
forming a first metal-containing layer on a major portion of one of the major surfaces of said ceramic wafer;
forming a second metal-containing layer on a major portion of the other of said major surfaces of said ceramic wafer;
supporting only one high power insulated gate switching transistor chip on said wafer with said high power insulated gate switching transistor chip of being of pre-tested and pre-selected performance specifications and with a first active region of said transistor chip in low electrical resistance communication with said first metal-containing layer, effective to form a substrate subassembly;
disposing said subassembly on a temporary support such that heat added to said wafer by electrical operation of said transistor chip is removed into said temporary support via said second metal-containing layer;
while said substrate subassembly is disposed on said support, temporarily contacting all active regions of said transistor chip and testing said transistor chip at its intended operating power level; and
sorting said substrate subassemblies into two or more groups of operable units in accordance with performance characteristics determined by said testing.
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Abstract
A substrate subassembly for a high power module, and methods involving the same. The substrate subassembly contains only one switching transistor and has at least one integral short terminal lead tab. The substrate subassemblies can be pretested at significant operating current, to obtain enhanced characterization and matching of mounted switching transistors. Trimmable gate lead resistances can be incorporated in the substrate subassemblies. Enhanced compositional, geometrical and electrical module symmetry is available. New module structures and method are afforded.
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Citations
8 Claims
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1. The method of making a high power semiconductor substrate subassembly comprising the steps of:
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providing a ceramic wafer having opposed major surfaces; forming a first metal-containing layer on a major portion of one of the major surfaces of said ceramic wafer; forming a second metal-containing layer on a major portion of the other of said major surfaces of said ceramic wafer; supporting only one high power insulated gate switching transistor chip on said wafer with said high power insulated gate switching transistor chip of being of pre-tested and pre-selected performance specifications and with a first active region of said transistor chip in low electrical resistance communication with said first metal-containing layer, effective to form a substrate subassembly; disposing said subassembly on a temporary support such that heat added to said wafer by electrical operation of said transistor chip is removed into said temporary support via said second metal-containing layer; while said substrate subassembly is disposed on said support, temporarily contacting all active regions of said transistor chip and testing said transistor chip at its intended operating power level; and sorting said substrate subassemblies into two or more groups of operable units in accordance with performance characteristics determined by said testing. - View Dependent Claims (2, 3, 4)
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5. A method of making a high power semiconductor module having matched components therein comprising the steps of:
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providing a plurality of ceramic wafers, each of which has opposed major surfaces; forming a first metal-containing layer on a major portion of one of the major surfaces of each of said ceramic wafers; forming a second metal-containing layer on a major portion of the other of said major surfaces of each of said ceramic wafers; supporting only one high power insulated gate switching transistor chip on one of said metal-containing layers of each of said wafers, with said high power insulated gate switching transistor chip of being of pre-tested and pre-selected performance specifications, with each such switching transistor chip being soldered to the one metal-containing layer and a low electrical resistance communication being made between said one metal-containing layer and one active region of said switching transistor chip, effective to convert each substrate into a substrate subassembly; disposing each such substrate subassembly on a temporary support that will remove heat produced in said wafer by electrical operation of said switching transistor chip; while each said substrate subassembly is being cooled on said support, temporarily contacting said one metal-containing layer and other active regions of said switching transistor chip; testing the switching transistor chip of each substrate subassembly at its intended electrical current rating while that substrate subassembly is being cooled on said temporary support, to determine electrical performance characteristics of said switching transistor as mounted in said substrate subassembly; after such testing, placing each tested substrate subassembly into one of at least two groups in accordance with performance characteristics as determined in said testing; assembling a plurality of substrate assemblies from only one of such groups into a single housing that has a power input terminal, a power output terminal, and a control terminal, with said substrate subassemblies being mounted in said housing to permit mutually cooling during operation of the switching transistors on such substrate subassemblies; providing an electrical connection between said power input terminal and an input region of the switching transistor chip on each such substrate subassembly in said housing; providing an electrical connection between said power output terminal and an output region of the switching transistor chip on each substrate subassembly in said housing; and providing a control voltage from said control terminal to the switching transistor chip on each substrate subassembly. - View Dependent Claims (6, 7, 8)
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Specification