Method of forming a contact using a trench and an insulation layer during the formation of a semiconductor device

• US 5,492,853 A
• Filed: 03/11/1994
• Issued: 02/20/1996
• Est. Priority Date: 03/11/1994
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Semiconductor, Inc. (Micron Technology, Inc.)
• Inventors: Schuele, Paul J., Harshfield, Steven T., Jeng, Nanseng
• Primary Examiner(s): Hearn, Brian E.
• Assistant Examiner(s): Radomsky, Leon
• Application Number:
  US08/209,584
• Time in Patent Office: 711 Days
• Field of Search: 437/203, 437/60, 437/52, 437/919, 437/979, 437/985, 437/67, 148/DIG. 14, 257/68, 257/71, 257/903
• US Class Current: 438/666
• CPC Class Codes: H10B 12/033 the capacitor extending over the transistor
• CPC Class Codes: H10B 12/05 Making the transistor
• CPC Class Codes: H10B 12/31 having a storage electrode stacked over the transistor
• CPC Class Codes: H10B 12/33 the capacitor extending under the transistor
• CPC Class Codes: Y10S 148/014 Capacitor

Abstract

A structure and process for forming a contact to a semiconductor substrate on a semiconductor device comprises the step of forming a patterned mask over a semiconductor substrate and over a field oxide region, then etching the semiconductor substrate and the field oxide region to form a trench. The trench comprises a bottom and a first sidewall consisting of silicon and a second sidewall comprising field oxide. The etching step removes a part of a doped region in the substrate. Next, a blanket nitride layer and a blanket oxide layer is formed over the substrate, and a spacer etch is performed on the nitride and oxide layer leaving nitride and oxide over the first and second sidewalls. The trench bottom is oxidized to form a layer of oxide over the bottom of the trench thereby insulating the trench bottom, and the oxide encroaches under the nitride and oxide on the sidewalls to join with the field oxide. The nitride and oxide is removed from the sidewalls, and a conductive layer is formed over the exposed trench sidewalls, the trench bottom being insulated from the conductive layer by the oxide layer over the bottom of the trench. The oxide on the bottom of the trench contacts the field oxide. The contact is isolated from the substrate along the trench bottom and the second sidewall, making contact with the substrate only in the area of the first sidewall.

Claims

1. A process for forming a semiconductor device, comprising the following steps:

a) forming a patterned mask over a semiconductor substrate and over a field oxide region;

b) etching said semiconductor substrate and said field oxide region to form a trench therein, said trench having a bottom above a bottom of said field oxide and a first sidewall consisting of silicon and a second sidewall comprising field oxide, said etching of said substrate removing part of a doped region therein;

c) forming a protective layer over said first and second sidewalls;

d) oxidizing said trench bottom to form a layer of oxide over said bottom of said trench, thereby insulating said trench bottom, said layer of oxide contacting said second sidewall;

e) removing said protective layer from said trench sidewalls;

f) exposing said sidewalls; and

g) forming a conductive layer over said exposed trench sidewalls, said trench bottom being insulated from said conductive layer by said oxide on said trench bottom.

2. The process of claim 1, wherein said oxide over said trench bottom encroaches under said protective layer to join with said field oxide.

3. The process of claim 1 wherein said second sidewall further comprises silicon.

4. The process of claim 1 wherein said second sidewall consists of field oxide.

5. The process of claim 1 wherein said oxide on said trench bottom after step f) is at least 50 Å

thick.

6. The process of claim 1 wherein said protective layer comprises nitride, and said removal of said protective layer exposes said sidewalls.

7. The process of claim 1 further comprising the steps of:

a) forming an oxide layer over said trench sidewalls prior to step c);

b) removing said oxide layer over said trench sidewalls subsequent to step e), wherein said removal of said oxide layer over said trench exposes said sidewalls.

8. A process for forming a buried contact to a semiconductor substrate on a semiconductor device, comprising the following steps:

a) forming a patterned mask over a semiconductor substrate and over a field oxide region;

b) etching said semiconductor substrate and said field oxide region to form a trench therein, said trench having a bottom above a bottom of said field oxide and a first sidewall consisting of silicon and a second sidewall comprising field oxide, said etching removing part of a doped region in said substrate;

c) forming a blanket protective layer over said substrate;

d) etching said blanket protective layer leaving said protective layer over said first and second sidewalls;

e) oxidizing said trench bottom to form a layer of oxide over said bottom of said trench thereby insulating said trench bottom, said oxide over said bottom of said trench contacting said second sidewall;

f) removing said protective layer;

g) exposing said sidewalls; and

h) forming a conductive layer over said exposed trench sidewalls, said trench bottom being insulated from said conductive layer by said oxide layer over said bottom of said trench.

9. The process of claim 8, wherein said oxide over said trench bottom encroaches under said protective layer to join with said field oxide.

10. The process of claim 8 wherein said second sidewall further comprises silicon.

11. The process of claim 8 wherein said second sidewall consists of field oxide.

12. The process of claim 8 wherein said oxide on said trench bottom after step f) is at least 50 Å

thick.

13. The process of claim 8 wherein said protective layer comprises nitride, and said removal of said protective layer exposes said sidewalls.

14. The process of claim 8 further comprising the steps of:

a) forming an oxide layer over said trench sidewalls prior to step c);

b) removing said oxide layer over said trench sidewalls subsequent to step e), wherein said removal of said oxide layer over said trench exposes said sidewalls.

15. A process for forming a buried contact to a semiconductor substrate on a random access memory device, comprising the following steps:

a) forming a patterned mask over a semiconductor substrate and over a field oxide region, said field oxide having a top and a bottom;

b) etching said semiconductor substrate and said field oxide region to form a trench therein, said trench having a bottom and a first sidewall consisting of silicon and a second sidewall comprising field oxide, said bottom of said trench having a level higher than said bottom of said field oxide, said etching removing part of a doped region in said substrate;

c) forming a blanket protective layer over said substrate;

d) etching said blanket protective layer leaving said protective layer over said first and second sidewalls;

e) oxidizing said trench bottom to form a layer of oxide over said bottom of said trench thereby insulating said trench bottom, said oxide over said bottom of said trench encroaching under said protective layer to join with said field oxide and contacting said second sidewall;

f) removing said protective layer;

g) exposing said sidewalls; and

h) forming a conductive layer over said exposed trench sidewalls, said trench bottom being insulated from said conductive layer by said oxide layer over said bottom of said trench.

16. The process of claim 15 wherein said second sidewall further comprises silicon.

17. The process of claim 15 wherein said second sidewall consists of field oxide.

18. The process of claim 15 wherein said oxide on said trench bottom after step f) is at least 50 Å

thick.