Speed control for a universal AC/DC motor

• US 5,495,161 A
• Filed: 01/05/1994
• Issued: 02/27/1996
• Est. Priority Date: 01/05/1994
• Status: Expired due to Term

• Current Assignee: Senco Brands Incorporated (Kyocera Corporation)
• Original Assignee: Senco Brands Incorporated (Kyocera Corporation)
• Inventors: Hunter, Erick D.
• Primary Examiner(s): Sircus, Brian
• Application Number:
  US08/177,463
• Time in Patent Office: 783 Days
• Field of Search: 318/244, 318/245, 318/807, 318/809-811, 388/911
• US Class Current: 318/807
• CPC Class Codes: H02P 25/145 whereby the speed is regulated by measuring the motor speed and comparing it with a given physical value, speed feedback

Abstract

A series universal AC/DC motor is controlled by switching the phase angle of an AC signal with a triac power switch in response to a motor control providing a phase-locked loop velocity control. A speed command circuit provides a reference frequency corresponding to a selected motor speed. The reference frequency is compared to a feedback frequency representing actual motor speed. An error signal representing the phase difference between the reference and feedback frequencies is compared to a ramp signal produced by the AC power source, and a resulting trigger pulse is used to control the triac power switch, thereby regulating the speed of the motor.

Claims

1. A speed control for a motor control connected to a universal AC/DC motor powered by an AC signal from a source of AC power, the motor control including a triac power switch and an analog reference circuit, the triac power switch being connected between the source of AC power and the motor and including a trigger input for controlling the application of the AC signal to the motor;

and the analog reference circuit being responsive to the AC signal for iteratively providing ramp signals, each ramp signal restarting approximately with each zero crossing of the AC signal, the speed control comprising;

an input switch circuit providing an input signal having a voltage amplitude representing a desired motor speed;

a voltage controlled oscillator connected to the input switch circuit and producing a speed command signal having a reference frequency as a function of the voltage amplitude of the input signal;

a feedback transducer responsive to rotation of the motor for producing a feedback signal having a feedback frequency representing an actual speed of the motor;

a phase detector responsive to the speed command signal and the feedback signal for producing a phase error signal representing a difference in phase between the reference and feedback frequencies;

a diode bridge circuit for generating a DC voltage level responsive to the phase error signal;

a low pass filter responsive to the DC voltage level from the diode bridge circuit for producing an averaged phase error signal;

and a comparator connected to the analog reference circuit and the low pass filter for producing a trigger pulse in response to each ramp signal, each trigger pulse having a leading edge with respect to a respective ramp signal as a function of the averaged phase error signal, whereby the AC signal is applied to the motor as a function of the phase error signal, thereby maintaining a zero frequency difference between the reference and feedback frequencies and causing the actual motor speed to be approximately equal to the desired motor speed.

2. A speed control connected to a universal AC/DC motor powered by an AC signal from a source of AC power, the speed control having a triac power switch connected between the source of AC power and the motor, and the triac power switch including a trigger input for controlling the application of the AC signal to the motor;

and the speed control being responsive to the AC signal to iteratively initiate ramp signals synchronized with zero crossings of the AC signal, each ramp signal having a duration approximately equal to the duration between the zero crossings of the AC signal, the speed control further comprising;

a speed command circuit to selectively provide one of a plurality of speed command signals having a reference frequency representing one of a plurality of selectable desired speeds of the motor;

a feedback circuit responsive to rotation of the motor and producing a feedback signal having a feedback frequency representing an actual speed of the motor;

a phase detector responsive to the one of the plurality of speed command signals and the feedback signal for producing a phase error signal having a duty cycle proportional to a difference in phase between the reference and feedback frequencies;

a diode switching and low pass filter circuit connected to the output of the phase detector for generating a DC signal responsive to the phase error signal representative of an average phase error signal;

and a comparator circuit connected to the trigger input of the triac power switch and responsive to the ramp signals and the signal representative of the average phase error signal for producing trigger pulses, the trigger pulses being initiated as a function of a phase difference between the reference frequency and the feedback frequency, whereby switching the triac power switch with the trigger pulses applies the AC signal to the motor as a function of the frequency difference thereby causing the actual motor speed to be approximately equal to the desired motor speed.

3. The speed control of claim 2 wherein the speed command circuit includes:

an input switch circuit providing an input signal having a voltage amplitude representing the one of the plurality of selectable desired speeds of the motor; and

a voltage controlled oscillator responsive to the input signal and producing the one of the plurality of speed command signals having the reference frequency.

4. The speed control of claim 2 wherein the phase detector is a tri-state phase comparator producing a series of pulses including positive pulses representing a first phase difference between the speed command signal and the feedback signal and negative pulses representing a second phase difference between the speed command signal and the feedback signal.

5. The speed control of claim 4 wherein the first phase difference is produced in response to the feedback signal lagging the speed command signal and the second phase difference is produced in response to the feedback signal leading the speed command signal.

6. The speed control of claim 2 wherein the diode switching and low pass filter circuit further functions as a digital-to-analog converter.

7. The speed control of claim 2 wherein each trigger pulse has a pulse width determined as a function of the phase error signal.

8. The speed control of claim 2 wherein the speed command circuit selectively provides one of a plurality of speed command signals representing a desired speed of the motor in a range of from approximately 7,000 revolutions per minute to approximately 15,000 revolutions per minute.

9. The speed control of claim 2 wherein the comparator circuit produces trigger pulses to the triac to cause the actual motor speed to be approximately equal to the desired motor speed within a time period no greater than approximately 500 milliseconds.

10. The speed control of claim 2 wherein comparator circuit maintains the actual motor speed to be approximately within one percent of the desired motor speed.

11. A speed control for a universal AC/DC motor responsive to an AC signal from a source of AC power, the speed control comprising:

a speed command circuit selectively providing one of a plurality of speed command signals having a reference frequency representing one of a plurality of selectable desired speeds of the motor;

a feedback circuit responsive to rotation of the motor and producing a feedback signal having a feedback frequency representing an actual speed of the motor;

a phase detector responsive to the one of the plurality of speed command signals and the feedback signal and producing a phase error signal as a function of a phase difference between the reference frequency and the feedback frequency;

a diode bridge and filter circuit coupled to the output of the phase detector for generating an analog DC signal responsive to the phase error signal representative of the average phase error;

an analog reference circuit responsive to the AC signal and iteratively providing ramp signals synchronized with each zero crossing of the AC signal;

a pulse generator responsive to the ramp signal and the average phase error signal for producing a series of trigger pulses having a frequency of occurrence determined by the ramp signals, and each trigger pulse being initiated during a respective ramp signal as a function of the phase error signal; and

a triac power switch connected between the source of AC power and the motor to control the application of the AC signal to the motor, the triac power switch having a trigger input responsive to the trigger pulses to control the switching of the triac power switch, whereby the AC signal is applied to the motor as a function of the error signal thereby causing the actual motor speed to be approximately equal to the one of the plurality of desired motor speeds.

12. The speed control of claim 11 wherein the phase detector is a tri-state phase comparator producing a series of pulses including positive pulses representing a first phase difference between the speed command signal and the feedback signal and negative pulses representing a second phase difference between the speed command signal and the feedback signal.