Double sampled biquad switched capacitor filter
First Claim
1. A biquad switched capacitor filter comprising:
- a first stage including a first operational amplifier having inverting and noninverting inputs for receiving an analog signal, and positive and negative outputs, and feedback capacitors connected between said outputs and opposite polarity inputs of said first operational amplifier;
a second stage including a second operational amplifier having inverting and noninverting inputs and positive and negative outputs, and feedback capacitors connected between said outputs and opposite polarity inputs of said second operational amplifier;
a first cross-coupled switched capacitor circuit for coupling charge from the outputs of said first operational amplifier to a first pair of capacitors on first and second clock phases and for coupling charge from said first pair of capacitors to the inputs of said second operational amplifier on said second clock phase; and
a second cross-coupled switched capacitor circuit for coupling charge from the outputs of said second operational amplifier to a second pair of capacitors on said first and second clock phases and for coupling charge from said second pair of capacitors to the inputs of said first operational amplifier on said first clock phase.
1 Assignment
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Accused Products
Abstract
A biquad switched capacitor filter is preferably utilized as the output filter in a sigma delta digital-to-analog converter. The switched capacitor filter uses a cross-coupled switched capacitor circuit which delivers charge to the capacitors on both phases of the clock. As a result, the sizes of the capacitors can be reduced by a factor of two, while delivering the same charge as a single sampling circuit. By using the cross-coupled switching circuit everywhere in the filter, the sensitivity to capacitor mismatches is substantially reduced. The clock phases applied to the stages of the filter are alternated so that there is a one clock cycle delay around each loop containing two filter stages, thereby insuring the stability of the filter.
177 Citations
11 Claims
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1. A biquad switched capacitor filter comprising:
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a first stage including a first operational amplifier having inverting and noninverting inputs for receiving an analog signal, and positive and negative outputs, and feedback capacitors connected between said outputs and opposite polarity inputs of said first operational amplifier; a second stage including a second operational amplifier having inverting and noninverting inputs and positive and negative outputs, and feedback capacitors connected between said outputs and opposite polarity inputs of said second operational amplifier; a first cross-coupled switched capacitor circuit for coupling charge from the outputs of said first operational amplifier to a first pair of capacitors on first and second clock phases and for coupling charge from said first pair of capacitors to the inputs of said second operational amplifier on said second clock phase; and a second cross-coupled switched capacitor circuit for coupling charge from the outputs of said second operational amplifier to a second pair of capacitors on said first and second clock phases and for coupling charge from said second pair of capacitors to the inputs of said first operational amplifier on said first clock phase. - View Dependent Claims (2, 3, 4, 5)
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6. In combination:
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A one-bit digital-to-analog converter for converting a data stream to an analog signal; and a biquad switched capacitor filter comprising; a first stage including a first operational amplifier having inverting and noninverting inputs for receiving said analog signal, and positive and negative outputs, and feedback capacitors connected between said outputs and opposite polarity inputs of said first operational amplifier; a second stage including a second operational amplifier having inverting and noninverting inputs and positive and negative outputs, and feedback capacitors connected between said outputs and opposite polarity inputs of said second operational amplifier; a first cross-coupled switched capacitor circuit for coupling charge from the outputs of said first operational amplifier to a first pair of capacitors on first and second clock phases and for coupling charge from said first pair of capacitors to the inputs of said second operational amplifier on said second clock phase; and a second cross-coupled switched capacitor circuit for coupling charge from the outputs of said second operational amplifier to a second pair of capacitors on said first and second clock phases and for coupling charge from said second pair of capacitors to the inputs of said first operational amplifier on said first clock phase. - View Dependent Claims (7, 8, 9, 10)
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11. A sigma delta digital-to-analog converter comprising:
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an interpolation filter for increasing the rate of an input digital signal to provide a high data rate digital signal; a sigma delta modulator for converting the high data rate digital signal to a one-bit signal with shaped quantization noise and providing a modulator output; a one-bit digital-to-analog converter for converting the modulator output to an analog signal; and a biquad switched capacitor output filter comprising; a first stage including a first operational amplifier having inverting and noninverting inputs for receiving said analog signal, and positive and negative outputs, and feedback capacitors connected between said outputs and opposite polarity inputs of said first operational amplifier; a second stage including a second operational amplifier having inverting and noninverting inputs and positive and negative outputs, and feedback capacitors connected between said outputs and opposite polarity inputs of said second operational amplifier; a first cross-coupled switched capacitor circuit for coupling charge from the outputs of said first operational amplifier to a first pair of capacitors on first and second clock phases and for coupling charge from said first pair of capacitors to the inputs of said second operational amplifier on said second clock phase; and a second cross-coupled switched capacitor circuit for coupling charge from the outputs of said second operational amplifier to a second pair of capacitors on said first and second clock phases and for coupling charge from said second pair of capacitors to the inputs of said first operational amplifier on said first clock phase.
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Specification