Anti-fuse ROM programming circuit

• US 5,495,436 A
• Filed: 01/13/1995
• Issued: 02/27/1996
• Est. Priority Date: 01/13/1995
• Status: Expired due to Fees

• Current Assignee: VLSI Technology, Inc. (Koninklijke Philips N.V.)
• Original Assignee: VLSI Technology, Inc. (Koninklijke Philips N.V.)
• Inventors: Callahan, John M.
• Primary Examiner(s): Nelms, David C.
• Assistant Examiner(s): NIRANJAN, FRANK
• Application Number:
  US08/372,087
• Time in Patent Office: 410 Days
• Field of Search: 365/96, 365/225.7, 327/536
• US Class Current: 365/96
• CPC Class Codes: G11C 17/18 Auxiliary circuits, e.g. for writing into memory

Abstract

A "charge-kicker" programming circuit for programming anti-fuse links in integrated-circuit memory devices permits smaller feature sizes and a correspondingly lower breakdown voltage by using reduced internal voltage levels to generate a gate voltage for a series pass transistor. A series pass transistor gates a high voltage programming signal (typically 13 volts) to a high-voltage programming line. Selection circuits steer the high voltage programming signal to various columns of anti-fuse elements. A fixed voltage, insufficient to turn on the series pass transistor is applied to the gate terminal of the series pass transistor. An alternating voltage is applied directly onto the gate terminal of the series pass transistor through a capacitor so that the peaks of the alternating voltage turn on the series pass transistor which gates the programming voltage to the main high voltage programming line for the anti-fuse memory array.

Claims

1. An on-chip programming circuit for programming anti-fuse elements of an integrated-circuit ROM, comprising:

a series pass transistor for directing a high voltage programming voltage to a high-voltage programming line for anti-fuse elements;

means for providing a fixed voltage to the gate terminal of the series pass transistor, wherein the fixed voltage is insufficient to turn on the series pass transistor;

means for directly superimposing an alternating voltage directly onto the gate terminal of the series pass transistor wherein the peaks of the alternating voltage superimposed on the gate terminal of the series pass transistor turn on the series pass transistor to apply the programming voltage to the main high voltage programming line of an anti-fuse memory array;

wherein the means for directly superimposing an alternating voltage directly onto the gate terminal of the series pass transistor includes a capacitor having one terminal connected to the gate terminal of the series pass transistor and having another terminal connected to an alternating voltage source.

2. The on-chip programming circuit of claim 1 wherein the means for providing a fixed voltage to the gate terminal of the series pass transistor includes a saturating transistor having a drain terminal connected to the high voltage programming voltage, having a source terminal connected to the gate terminal of the series pass transistor, and having a gate terminal connected to a voltage sufficient to saturate the saturating transistor.

3. The on-chip programming circuit of claim 1 including means for shorting the gate terminal of the series pass transistor to a ground voltage.

4. The on-chip programming circuit of claim 1 including means for shorting the source terminal of the series pass transistor to a ground voltage.

5. An on-chip programming circuit for programming anti-fuse elements of an integrated-circuit ROM, comprising:

an input terminal for the programming circuit at which is provided a programming voltage;

an output terminal of the programming circuit;

a first series transistor having a drain terminal connected to the input terminal of the programming circuit and having a source terminal connected to the output terminal of the programming circuit;

a saturated transistor having a drain terminal connected to the input terminal of the programming circuit, having a source terminal connected to the gate terminal of the first series transistor, and having a gate terminal to which is applied a positive voltage source so that the second saturated transistor remains in the saturated mode of operation;

an oscillator input terminal;

a series capacitor having a first terminal connected to the oscillator input terminal and a second terminal connected to the gate terminal of the series transistor;

an oscillator circuit connected to the oscillator input terminal and providing an alternating voltage signal through the series capacitor directly to the gate terminal of the first series transistor, where the oscillator provides a peak voltage sufficient to turn on the first series transistor so that the programming voltage is applied to the output terminal of the circuit voltage during the positive peaks of the oscillator voltage.

6. The programming circuit of claim 5 wherein the programming voltage is 13 volts.

7. The programming circuit of claim 6 wherein the output alternating voltage of the oscillator circuit is 6 volts peak.

8. The programming circuit of claim 5 including a first shunt transistor having a source terminal, a drain terminal, and a gate terminal, wherein the drain terminal is connected to the output terminal of the circuit, wherein the source terminal is connected to a ground potential;

and wherein the gate terminal is connected to a first logic signal which goes HIGH to turn on the first shunt transistor and shunt the output terminal of the circuit to the ground potential.

9. The programming circuit of claim 5 including a second shunt transistor having a source terminal, a drain terminal, and a gate terminal, wherein the drain terminal is connected to the gate terminal of the first series transistor, wherein the gate terminal is connected to a positive voltage;

and wherein the source terminal is connected to a logic terminal which has a signal logic signal applied thereto for disabling the first series transistor.

10. The programming circuit of claim 5 including selection means for connecting an anti-fuse element to be programmed to the output terminal of the programming circuit to provide the programming voltage to the anti-fuse element.

11. The programming circuit of claim 5 including means for activating the programming circuit by applying a positive voltage signal to the gate terminal of the saturated transistor.

12. The programming circuit of claim 11 wherein the means for activating the programming circuit by applying a positive voltage signal to the gate terminal of the second saturated transistor includes means for starting the oscillator circuit.

13. The programming circuit of claim 5 including a column select transistor having a drain terminal connected to the output terminal of the programming circuit, having a source terminal connected to an anti-fuse link, and a gate terminal connected to a 15 volt high voltage column address voltage to provide a 13 volt programming voltage to the anti-fuse link through the column select transistor.

15. The method of claim 9 including the step of gating the programming voltage to the anti-fuse device through a switching transistor.

14. A method for programming anti-fuse elements of an anti-fuse ROM, comprising the steps off:

applying a programming voltage to the drain terminal of a series pass transistor, which has a source terminal at which is provided a programming voltage for an anti-fuse element;

applying the program voltage to the drain terminal of a saturating transistor, which has a source terminal connected to the gate terminal of the series pass transistor;

applying a voltage to the gate terminal of the saturating transistor to put the saturating transistor in a saturated mode;

coupling an output voltage of an oscillator through a capacitor directly to the gate terminal of the series pass transistor;

turning on the series pass transistor on the peak of the output voltage of the oscillator to provide a programming voltage for the anti-fuse element.