Communications network, state machine therefor
First Claim
1. A link apparatus containing a circuit for automatically prepending a protocol symbol to a data message to be placed on a communications bus, the link apparatus being contained in a node of a multiple node vehicle communications network, the bus being prescribed for use in an automobile industrial standard for data communications network interfaces, each node also containing a microcontroller (MCU) connected between an input device and input terminals of the link apparatus for receiving a chosen measurand from the input device and then translating the measurand into digital data messages in response to changes of the measurand, the link apparatus also containing a symbol encoder/decoder (SED) for receiving serially arranged bits of protocol and data messages and then formatting each bit into a variable pulse width modulated (VPWM) signal, each VPWMsignal being routed from the link apparatus to an integrated driver/receiver (IDR) circuit, also in each node, that connects to the bus, the IDR containing a transmitter circuit for converting each VPWM signal into a trapezoidal shaped waveform analog signal called a symbol containing information expressing a magnitude value of the digital bit component of the byte message, the IDR also containing a receiver circuit for receiving a reflection of each of the symbols from the bus and converting each symbol into a VPWM bit that route back to the link apparatus where a series of bits are reassembled by the SED into the original protocol and data byte information of the message placed on the bus, the link apparatus comprising:
- A) a state machine device having;
1) a statein unit at an input end,2) a main state machine unit having input terminals connected to output terminals of the statein unit and3) a stateout unit having input terminals connected to output terminals of the main state machine unit and the statein unit;
the state machine device being used to monitor output signals from the SED and the MCU to determine when the bus is idle and in a condition to receive a new message and to determine when the MCU has converted measurand information into data bytes;
B) an encoder circuit for accepting a signal from the state machine device during a particular state of the state machine device and then automatically generating a coded address that routes to the SED for generating a VPWM signal that routes to the transmitter circuit of the IDR for placing a start-of-frame (SOF) protocol symbol on the bus; and
C) a vector device connected to the main state unit and the SED containing circuits for determining arbitration of the SOF protocol symbol with respect to other SOF protocol symbols that might appear on the bus nearly simultaneously, the vector device providing an error signal that resets the state machine device to an initial state if another protocol symbol from another node appears on the bus.
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Accused Products
Abstract
A link apparatus in a node of a mulitinode, collision--resolution, multiplexing communications system connected between a microcontroller (MCU) and a integrated driver and receiver (IDR) of the node for assuming some of the functions of the MCU in delivering and receiving messages to and from a signal-wire communications bus. The link apparatus provides circuits for automatically prepending a start-of-frame to a message being placed on the bus after determining that the conditions on the bus are suitable for transmitting messages. The link apparatus also contains circuits for determining when a node has won arbitration over another node competing for time on the bus.
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Citations
11 Claims
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1. A link apparatus containing a circuit for automatically prepending a protocol symbol to a data message to be placed on a communications bus, the link apparatus being contained in a node of a multiple node vehicle communications network, the bus being prescribed for use in an automobile industrial standard for data communications network interfaces, each node also containing a microcontroller (MCU) connected between an input device and input terminals of the link apparatus for receiving a chosen measurand from the input device and then translating the measurand into digital data messages in response to changes of the measurand, the link apparatus also containing a symbol encoder/decoder (SED) for receiving serially arranged bits of protocol and data messages and then formatting each bit into a variable pulse width modulated (VPWM) signal, each VPWMsignal being routed from the link apparatus to an integrated driver/receiver (IDR) circuit, also in each node, that connects to the bus, the IDR containing a transmitter circuit for converting each VPWM signal into a trapezoidal shaped waveform analog signal called a symbol containing information expressing a magnitude value of the digital bit component of the byte message, the IDR also containing a receiver circuit for receiving a reflection of each of the symbols from the bus and converting each symbol into a VPWM bit that route back to the link apparatus where a series of bits are reassembled by the SED into the original protocol and data byte information of the message placed on the bus, the link apparatus comprising:
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A) a state machine device having; 1) a statein unit at an input end, 2) a main state machine unit having input terminals connected to output terminals of the statein unit and 3) a stateout unit having input terminals connected to output terminals of the main state machine unit and the statein unit; the state machine device being used to monitor output signals from the SED and the MCU to determine when the bus is idle and in a condition to receive a new message and to determine when the MCU has converted measurand information into data bytes; B) an encoder circuit for accepting a signal from the state machine device during a particular state of the state machine device and then automatically generating a coded address that routes to the SED for generating a VPWM signal that routes to the transmitter circuit of the IDR for placing a start-of-frame (SOF) protocol symbol on the bus; and C) a vector device connected to the main state unit and the SED containing circuits for determining arbitration of the SOF protocol symbol with respect to other SOF protocol symbols that might appear on the bus nearly simultaneously, the vector device providing an error signal that resets the state machine device to an initial state if another protocol symbol from another node appears on the bus. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A link apparatus used in a node of a multinode, collision-resolution, multiplexing system containing a circuit for automatically prepending a protocol symbol to a data message to be placed on a single-wire communications bus which has been prescribed for use in an automobile industrial standard for data communications network interfaces, each node also containing a microcontroller (MCU) connected between an input device and input terminals of the link apparatus for:
- (1) receiving a chosen measurand from the input device and then translating the measurand into a digital byte message in response to changes of the measurand, (2) formatting the magnitudes of the measurand into address codes for selecting symbols of various pulse widths for transmitting symbols over the bus,and (3) polling output ports connected to the link apparatus to determine if the link apparatus is in a transmitting or a receiving mode; and
each node also containing an integrated driver/receiver (IDR) functioning as a transceiver that has an output that connects to the bus for sending to and receiving from other nodes connected to the bus each symbol placed on the bus in a chosen modified form, the link apparatus comprising;A) a state machine device for establishing a series of operating states for the node comprising; 1) a statein unit having a plurality of synchronous and asynchronous holding registers; 2) a main state machine unit having;
a) a next state decoder at an input port, b) a memory circuit composed of a parallel arrangement of a plurality of flip-flops connected to the output of the next state decoder, c) an output decoder having input terminals connected to the output of the memory circuit, and d) synchronized output gates having input terminals connected to the output of the memory circuit and output terminals providing synchronous output state signals within the link apparatus;B) a stateout unit having input terminals connected to output terminals of the main state machine unit and the statein unit for providing control signals within the link apparatus and to the MCU; C) an encoder circuit for accepting a signal from the state machine device during a particular state of the state machine device and then automatically generating a coded address used for generating a variable pulse width modulated (VPWM) signal that routes to the transmitter circuit of the IDR for placing a start of frame protocol symbol (SOF) on the bus; D) a symbol encoder/decoder (SED) used in the link apparatus for translating the coded address from the encoder into the VPWM signal that routes to the IDR, the IDR containing a driver for converting each VPWM signal into a trapezoidal shaped waveform analog signal called a symbol containing information expressing a magnitude value of the digital bit component of the message; and E) a vector circuit connected to the main state unit and the SED containing circuits for determining arbitration of the SOF protocol symbol with respect to other SOF protocol symbols that might appear on the bus nearly simultaneously, the vector circuit providing an error signal that resets the state machine device to an initial state if another protocol symbol from another node appears on the bus. - View Dependent Claims (8, 9, 10, 11)
- (1) receiving a chosen measurand from the input device and then translating the measurand into a digital byte message in response to changes of the measurand, (2) formatting the magnitudes of the measurand into address codes for selecting symbols of various pulse widths for transmitting symbols over the bus,and (3) polling output ports connected to the link apparatus to determine if the link apparatus is in a transmitting or a receiving mode; and
Specification