Ternary/binary converter circuit
First Claim
1. An integrated semiconductor circuit configuration, comprising:
- one input of the semiconductor circuit configuration for receiving a ternary input signal, and two outputs of the semiconductor circuit configuration for supplying two binary output signals;
first, second, third and fourth resistors being connected in series between an operating voltage potential and a reference potential, defining a first connecting node between said first and said second resistors, a second connecting node between said second and said third resistors, and a third connecting node between said third and said fourth resistors, the second connecting node forming the input of the semiconductor circuit configuration;
a first threshold value decision circuit having a first. CMOS inverter, an input connected to the first connecting node, and having an output;
a second threshold value decision circuit having a second CMOS inverter, an input connected to the third connecting node, and having an output; and
a logic circuit being connected to the outputs of said threshold value decision circuits, and having outputs forming the outputs of the semiconductor circuit configuration.
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Accused Products
Abstract
An integrated semiconductor circuit configuration includes one input of the circuit configuration for receiving a ternary input signal, and two outputs of the circuit configuration for supplying two binary output signals converted from the input signal. First, second, third and fourth resistors are connected in series between an operating voltage potential and a reference potential, defining a first connecting node between the first and the second resistors, a second connecting node between the second and the third resistors, and a third connecting node between the third and the fourth resistors. The second connecting node forms the input of the circuit configuration. A first threshold value decision circuit has an input connected to the first connecting node and has an output. A second threshold value decision circuit has an input connected to the third connecting node and has an output. A logic circuit is connected to the outputs of the threshold value decision circuits and has outputs forming the outputs of the circuit configuration.
18 Citations
10 Claims
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1. An integrated semiconductor circuit configuration, comprising:
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one input of the semiconductor circuit configuration for receiving a ternary input signal, and two outputs of the semiconductor circuit configuration for supplying two binary output signals; first, second, third and fourth resistors being connected in series between an operating voltage potential and a reference potential, defining a first connecting node between said first and said second resistors, a second connecting node between said second and said third resistors, and a third connecting node between said third and said fourth resistors, the second connecting node forming the input of the semiconductor circuit configuration; a first threshold value decision circuit having a first. CMOS inverter, an input connected to the first connecting node, and having an output; a second threshold value decision circuit having a second CMOS inverter, an input connected to the third connecting node, and having an output; and a logic circuit being connected to the outputs of said threshold value decision circuits, and having outputs forming the outputs of the semiconductor circuit configuration. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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Specification
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- Resources
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Current AssigneeQimonda AG (Infineon Technologies AG)
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Original AssigneeSiemens AG
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InventorsBowles, Gary-Alexander
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Primary Examiner(s)Westin, Edward P.
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Assistant Examiner(s)Sanders, Andrew
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Application NumberUS08/126,333Time in Patent Office900 DaysField of Search326/59, 326/60, 326/80, 326/121US Class Current326/60CPC Class CodesH03M 5/18 two levels being symmetrica...
