Spread spectrum correlator

• US 5,499,265 A
• Filed: 03/21/1994
• Issued: 03/12/1996
• Est. Priority Date: 08/07/1989
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Omnipoint Data Company, Incorporated
• Inventors: Dixon, Robert C., Vanderpool, Jeffrey S.
• Primary Examiner(s): Cain, David C.
• Application Number:
  US08/216,084
• Time in Patent Office: 722 Days
• Field of Search: 375/1, 375/48, 375/66, 375/89, 455/59, 455/103, 455/209, 455/216, 364/726, 380/34
• US Class Current: 375/150
• CPC Class Codes: H04B 1/707 using direct sequence modulation
• CPC Class Codes: H04B 1/709 Correlator structure

Abstract

An apparatus for decoding a received spread spectrum signal having a data signal modulated with a pseudo-noise code and transmitted as an RF spread spectrum signal. A first reference register holds a first pseudo-noise signal, a second reference register holds a second pseudo-noise signal, and a receive-register holds a received spread spectrum signal. A first modulo adder adds each chip of the received spread spectrum signal with each respective chip of the first pseudo-noise signal, thereby generating a first plurality of chip-comparison signals. A first summer adds the first plurality of chip-comparison signals, generating a first correlation signal. The comparator compares the correlation signal to an upper-threshold level and a lower-threshold level, and respectively generates a first data-symbol signal or a second data-symbol signal.

Claims

1. Apparatus for decoding a spread spectrum signal, said spread spectrum signal having a data signal modulated with the entirety of a pseudo-noise code, said apparatus comprising

a plurality of receiving registers capable of storing a received spread spectrum signal comprising a first plurality of chips,

a plurality of reference registers capable of storing an entire pseudo-noise code comprising a second plurality of chips,

a plurality of adders, each of said adders connected to one of said plurality of receiving registers and one of said plurality of reference registers, each of said adders having an output connected to a summer, said summer outputting a correlation signal, and

a data generator responsive to said correlation signal, generating, at selected clock times, a first data symbol in response to a comparison of said correlation signal and a first predetermined threshold level, and a second data symbol at said clock times in response to a comparison of said correlation signal and a second predetermined threshold level.

2. Apparatus for decoding a spread spectrum signal, said spread spectrum signal having a data signal modulated with the entirety of a code, said apparatus comprising

a plurality of receiving registers capable of storing a received spread spectrum signal comprising a first plurality of chips,

a plurality of reference registers capable of storing an entire pseudo-noise code comprising a second plurality of chips,

a plurality of adders, each of said adders connected to one of said plurality of receiving registers and one of said plurality of reference registers, each of said adders having an adder output,

a summer having inputs connected to said adder outputs, said summer outputting a correlation signal, and

a data generator responsive to said correlation signal, whereby a first data symbol is generated in response to a comparison of said correlation signal with a first threshold level, and a second data symbol is generated in response to a comparison of said correlation signal with a second threshold level.

3. Apparatus for decoding a spread spectrum signal, said spread spectrum signal having a data signal modulated with the entirety of a code of length L, said apparatus comprising

means for generating a correlation signal for L/2+1 or more chips of said spread spectrum signal and L/2+1 or more chips of a signal corresponding to said code;

and

means for directly generating a plurality of data symbols in response to a comparison of said correlation signal with a plurality of threshold levels.

19. The apparatus of claim 3 wherein said correlation signal is generated for fewer than L but more than L/2+1 chips of said spread spectrum signal.

4. Apparatus for decoding a spread spectrum signal, said spread spectrum signal having a data signal modulated with a code of length L, said apparatus comprising

means for generating a correlation signal for said spread spectrum signal and a signal corresponding to said code;

and

means for directly generating a data signal in response to said correlation signal, said data signal comprising one data bit for each L chips in said code.

5. Apparatus for decoding a spread spectrum signal, said spread spectrum signal having a data signal modulated with a code, said apparatus comprising

means for generating a correlation signal for said spread spectrum signal and a signal corresponding to said code;

and

means for generating a data signal in response to said correlation signal, without reference to a code preamble for said code.

6. Apparatus for decoding a spread spectrum signal, said spread spectrum signal having a data signal modulated with a code, said apparatus comprising

means for generating a correlation signal for said spread spectrum signal and a signal corresponding to said code;

and

means for generating a data signal in response to said correlation signal without reference to a synchronization signal for said code.

7. Apparatus for decoding a spread spectrum signal, said spread spectrum signal having a data signal modulated with a code, said apparatus comprising

means for generating a correlation signal for said spread spectrum signal and a signal corresponding to said code;

and

means for generating a data signal in response to said correlation signal, without reference to either a synchronization signal or a code preamble for said code.

8. A method of decoding a spread spectrum signal, said spread spectrum signal having a data signal modulated with the entirety of a pseudo-noise code having a length of L chips, said method comprising the steps of:

receiving and storing said spread spectrum signal,

generating and storing a reference signal corresponding to at least L/2+1 chips of said pseudo-noise code,

comparing each chip of said spread spectrum signal with a corresponding chip of said reference signal,

generating a correlation signal representing a degree of match between said spread spectrum signal and said reference signal, and

generating, at selected clock times, a first data symbol in response to a comparison of said correlation signal and a first predetermined threshold level, and a second data symbol at said clock times in response to a comparison of said correlation signal and a second predetermined threshold level.

9. A method of decoding a spread spectrum signal, said spread spectrum signal having a data signal modulated with the entirety of a code having a length of L chips, said method comprising the steps of

receiving and storing said spread spectrum signal,

generating a reference signal corresponding to at least L/2+1 chips of said pseudo-noise code,

adding each chip of said spread spectrum signal with a corresponding chip of said reference signal, and generating a plurality of chip comparison signals thereby,

generating a correlation signal by adding an output of each of said chip comparison signals, and

generating a first data symbol in response to a comparison of said correlation signal with a first threshold level, and a second data symbol in response to a comparison of said correlation signal with a second threshold level.

10. A method of decoding a spread spectrum signal, said spread spectrum signal having a data signal modulated with the entirety of a code of length L, comprising the steps of

comparing L/2+1 or more chips of said spread spectrum signal with L/2+1 or more chips of a signal corresponding to said code, and generating a correlation signal thereby,

directly generating a plurality of data symbols in response to a comparison of said correlation signal with a plurality of threshold levels.

20. The method of claim 10 wherein said correlation signal is generated for a comparison of fewer than L but more than L/2+1 chips of said spread spectrum signal and said signal corresponding to said code.

11. A method for decoding a spread spectrum signal, said spread spectrum signal having a data signal modulated with a code of length L, said method comprising the steps of

generating a correlation signal for said spread spectrum signal and a signal corresponding to said code, and

directly generating a data signal in response to said correlation signal, said data signal comprising one data bit for each L chips in said code.

12. A method of decoding a spread spectrum signal, said spread spectrum signal having a data signal modulated with a code of length L, said method comprising the steps of

generating a correlation signal for said spread spectrum signal and a signal corresponding to said code;

and

generating a data signal in response to said correlation signal, without reference to a code preamble for said code.

13. A method of decoding a spread spectrum signal, said spread spectrum signal having a data signal modulated with the entirety of a code, comprising the steps of

generating a correlation signal for said spread spectrum signal and a signal corresponding to said code, and

generating a data signal in response to said correlation signal, without reference to a synchronization signal for said code.

14. A method of decoding a spread spectrum signal, said spread spectrum signal having a data signal modulated with a code, said method comprising the steps of

generating a correlation signal for said spread spectrum signal and a signal corresponding to said code, and

generating a data signal in response to said correlation signal, without reference to either a synchronization signal or a code preamble for said code.

15. Apparatus for decoding a spread spectrum signal, said spread spectrum signal having a data signal modulated with the entirety of a pseudo-noise code, said apparatus comprising

a receiving register comprising a first plurality of stages wherein a first plurality of chips from an incoming signal are received and stored,

a reference register comprising a second plurality of stages wherein a second plurality of chips corresponding to a pseudo-noise code are stored,

a plurality of adders, each of said adders connected to one of said first plurality of stages and a corresponding one of said second plurality of stages,

a summer connected to an output of each of said adders,

a threshold setting circuit having as outputs a first threshold signal and a second threshold signal,

a first comparator having a first input connected to said summer and a second input to said first threshold signal, and outputting a first comparison signal,

a second comparator having a first input connected to said summer and a second input to said second threshold signal, and outputting a second comparison signal, and

a data generator responsive to said first and second comparison signals, outputting a first data symbol in response to said first comparison signal, and a second data symbol in response to said second comparison signal.

16. The apparatus of claim 15 further comprising a code generator capable of generating a plurality of pseudo-noise codes, from which one of said plurality of pseudo-noise codes is selected for storing in said reference register.

17. The apparatus of claim 16 further comprising a code selector connected to said code generator, whereby one of said plurality of pseudo-noise codes is selected for storing in said reference register.

18. The apparatus of claim 15 further comprising a counter coupled to a code clock generator, whereby said code clock generator controls loading of said pseudo-noise code into said reference register.