VGA hardware window control system

• US 5,500,654 A
• Filed: 11/16/1994
• Issued: 03/19/1996
• Est. Priority Date: 12/27/1993
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Fujimoto, Akihisa
• Primary Examiner(s): Weldon, Ulysses
• Assistant Examiner(s): Luu, Matthew
• Application Number:
  US08/341,058
• Time in Patent Office: 489 Days
• Field of Search: 345/3, 345/121, 345/115, 345/120, 345/132, 345/133
• US Class Current: 345/634
• CPC Class Codes: G06F 3/1431 using a single graphics controller
• CPC Class Codes: G09G 5/14 Display of multiple viewports
• CPC Class Codes: G09G 5/363 Graphics controllers
• CPC Class Codes: G09G 5/39 Control of the bit-mapped memory
• CPC Class Codes: G09G 5/393 Arrangements for updating the contents of the bit-mapped memory

Abstract

A screen CRTC generates a sync signal or the like for controlling a screen area of 1024×768 pixels in accordance with a screen parameter, and a window CRTC controls a display of a window area in accordance with a window parameter. When the display start position of the window is detected by the screen CRTC, display control of the window area performed by the window CRTC is started, thereby sequentially reading VGA data from the start address of a VRAM and converting the VGA data into video data. This video data is supplied to a display monitor during the display period of the window area, thereby displaying the video data in the window area.

Claims

1. A display control apparatus for controlling a display monitor of a computer system, comprising:

an image memory for storing, from a predetermined storage start position, display data formed by an application program executed by said computer system;

programmable parameter registers in which various parameter values designated by said system are set, said parameter registers being arranged such that a screen parameter for designating a size of an entire display screen area which can be displayed on said display monitor, and a window parameter for designating a display start position and a size of a window area to be displayed in said entire display screen area are set;

a first display control circuit for controlling said entire display screen area in accordance with the screen parameter, said first display control circuit including means for generating horizontal and vertical sync signals of said display monitor in response to a scanning timing for displaying said entire display screen area on said display monitor, means for generating a coordinate address indicating a scanning position on said entire display screen area in response to the scanning timing, and means for comparing a window area display start position designated by the window parameter with a value of the coordinate address to generate, on the basis of a comparison result, a window area detection signal indicating that the scanning position on said entire display screen area reaches the display start position of said window area;

a second display control circuit for controlling said window area in accordance with the window parameter, said second display control circuit including means for generating a display enable signal indicating a display period corresponding to said window area in response to the window area detection signal, and means for generating a memory address for reading out the display data from the storage start position of said image memory in response to the window area detection signal;

means for reading out the display data from the storage start position of said image memory in accordance with the memory address generated by said second display control circuit to convert the display data into video data which is to be supplied to said display monitor; and

means for supplying the video data to said display monitor in the display period designated by the display enable signal such that the display data formed by the application program is displayed in said window area.

2. An apparatus according to claim 1, further comprising:

a register, arranged in said parameter registers, in which a second window parameter for designating a display start position and a window size of a second window area for displaying external video data, which is externally supplied, in said entire display screen area are set;

means, arranged in said first display control circuit, for comparing a window area display start position designated by the second window parameter with a value of the coordinate address to generate, on the basis of a comparison result, a second window area detection signal indicating that a scanning position on said entire display screen area reaches the display start position of said second window area;

means, arranged in said second display control circuit, for generating a second display enable signal indicating a display period corresponding to said second window area in response to the second window area detection signal; and

means for supplying the external video data to said display monitor during the display period designated by the second display enable signal such that the external video data is displayed in said second window area.

3. An apparatus according to claim 1, further comprising:

a register, arranged in said parameter registers, in which a full-screen mode parameter for designating whether the display data is displayed on said display monitor in a full-screen mode is set; and

means for switching a parameter value referred to by said first display control circuit from the screen parameter to the window parameter such that said window area is displayed in the full-screen mode when the full-screen mode is designated by the full-screen mode parameter.

4. The apparatus according to claim 1, further comprising a hardware cursor display timing circuit for outputting a hardware cursor display enable signal to thereby display the hardware cursor when the coordinate address indicating a scanning position on said entire display screen area coincides with an address indicating a hardware cursor display start position.

5. A display control apparatus for controlling a flat panel display of a first resolution arranged in a computer system, comprising:

an image memory for storing, from a predetermined storage start position, display data having a second resolution lower than the first resolution and formed by an application program executed by said computer system;

programmable parameter registers in which various parameter values designated by said system are set, said parameter registers being arranged such that a screen parameter for designating the total number of horizontal characters and the total number of vertical lines of a display screen area to be displayed on said display monitor at the first resolution, and a window parameter for designating a display start position, the total number of horizontal characters, and the total number of vertical lines of a window area to display display data of the second resolution in said display screen area are set;

a first display control circuit for controlling said display screen area in accordance with the screen parameter, said first display control circuit including means for generating horizontal and vertical sync signals of said flat panel display in response to a scanning timing for displaying said display screen area of the first resolution on said flat panel display, means for generating a coordinate address indicating a scanning position on said display screen area in response to the scanning timing, means for comparing a window area display start position designated by the window parameter with a value of the coordinate address to generate, on the basis of a comparison result, a window area detection signal indicating that the scanning position on said display screen reaches the display start position on said display screen area;

a second display control circuit for controlling said window area in accordance with the window parameter, said second display control circuit including means for generating a display enable signal indicating a display period corresponding to said window area in response to the window area detection signal, and means for generating a memory address for reading out the display data from the storage start position of said image memory in response to the window area detection signal;

means for reading out the display data from the storage start position of said image memory in accordance with the memory address generated by said window display control circuit to convert the display data into video data which is to be supplied to said display monitor; and

means for supplying the video data to said display monitor during a display period designated by the display enable signal such that display data of the second resolution formed by the application program is displayed in said window area.

6. An apparatus according to claim 5, further comprising:

a register, arranged in said parameter registers, in which a second window parameter for designating a display start position and a window size of a second window area for displaying external video data, which is externally supplied, in said entire display screen area are set;

means, arranged in said first display control circuit, for comparing a window area display start position designated by the second window parameter with a value of the coordinate address to generate, on the basis of a comparison result, a second window area detection signal indicating that a scanning position on said entire display screen area reaches the display start position of said second window area;

means, arranged in said second display control circuit, for generating a second display enable signal indicating a display period corresponding to said second window area in response to the second window area detection signal; and

means for supplying the external video data to said display monitor during the display period designated by the second display enable signal such that the external video data is displayed in said second window area.

7. An apparatus according to claim 5, further comprising:

a register, arranged in said parameter registers, in which a full-screen mode parameter for designating whether the display data is displayed on said display monitor in a full-screen mode is set; and

means for switching a parameter value referred to by said first display control circuit from the screen parameter to the window parameter such that said window area is displayed in the full-screen mode when the full-screen mode is designated by the full-screen mode parameter.

8. An apparatus according to claim 5, wherein the display data of the first resolution is XGA (Extended Graphics Array) data, and the display data of the second resolution is VGA (Video Graphics Array) data.

9. An apparatus according to claim 5, wherein the display data of the first resolution is SVGA (Super Video Graphics Array) data, and the display data of the second resolution is VGA (Video Graphics Array) data.

10. The apparatus according to claim 5, further comprising a hardware cursor display timing circuit for outputting a hardware cursor display enable signal to thereby display the hardware cursor when the coordinate address indicating a scanning position on said entire display screen area coincides with an address indicating a hardware cursor display start position.

11. A display control apparatus for controlling a display monitor of a computer system, comprising:

an image memory for storing, from a predetermined storage start position, display data formed by an application program executed by said computer system;

programmable parameter registers in which various parameter values designated by said system are set, said parameter registers being arranged such that a screen parameter for designating a size of an entire display screen area which can be displayed on said display monitor, an application window parameter for designating a display start position and a size of a window area of an application program to be displayed in said entire display screen area, and an external video window parameter for designating a display start position and a size of a window area of external video data to be displayed in said entire display screen area are set;

a first display control circuit for controlling said entire display screen area in accordance with the screen parameter, said first display control circuit including means for generating horizontal and vertical sync signals of said display monitor in response to a scanning timing for displaying said entire display screen area on said display monitor, means for generating a coordinate address indicating a scanning position on said entire display screen area in response to the scanning timing, means for comparing an application window area display start position designated by the application window parameter with a value of the coordinate address to generate, on the basis of a comparison result, an application window area detection signal indicating that the scanning position on said entire display screen area reaches the display start position of said application window area, and means for comparing an external video window area display start position designated by the external video window parameter with the value of the coordinate address to generate, on the basis of a comparison result, an external video window area detection signal indicating that the scanning position on said entire display screen area reaches a display start position of said video window area;

a second display control circuit for controlling said application window area in accordance with the application window parameter, said second display control circuit including means for generating a display enable signal indicating a display period corresponding to said application window area in response to the application window area detection signal, and means for generating a memory address for reading out the display data from the storage start position of said image memory in response to the application window area detection signal;

a third display control circuit for controlling said external video window area in accordance with the external video window parameter, said third display control circuit including means for generating a display enable signal indicating a display period corresponding to said external video window area in response to the external video window area detection signal, and means for generating a memory address for reading out the display data from the storage start position of said image memory in response to the external video window area detection signal;

means for reading out the display data from the storage start position of said image memory in accordance with a selected one of the memory addresses generated by said second and third display control circuits to convert the display data into video data which is to be supplied to said display monitor; and

means for supplying the video data to said display monitor during the display period designated by the display enable signal such that the display data formed in said application window area by the application program is displayed in said application window area and the external video data is displayed in said external video window area.

12. An apparatus according to claim 11, wherein said first display control circuit displays XGA data, said second display control circuit displays VGA data, and said third display control circuit displays moving picture data.

13. An apparatus according to claim 12, wherein the moving picture data is MPEG data.

14. A display control apparatus for controlling a display monitor of a computer system, comprising:

an image memory for storing, from a predetermined storage start position, display data formed by an application program executed by said computer system;

programmable parameter registers in which various parameter values designated by said system are set, said parameter registers being arranged such that a screen parameter for designating a size of an entire display screen area which can be displayed on said display monitor, and an external video window parameter for designating a display start position and a size of a window area of external video data to be displayed in said entire display screen area are set;

a first display control circuit for controlling said entire display screen area in accordance with the screen parameter, said first display control circuit including means for generating horizontal and vertical sync signals of said display monitor in response to a scanning timing for displaying said entire display screen area on said display monitor, means for generating a coordinate address indicating a scanning position on said entire display screen area in response to the scanning timing, and means for comparing an external video window area display start position designated by the external video window parameter with a value of the coordinate address to generate, on the basis of a comparison result, an external video window area detection signal indicating that the scanning position on said entire display screen area reaches the display start position of said external video window area;

a second display control circuit for controlling said external video window area in accordance with the external video window parameter, said second display control circuit including means for generating a display enable signal indicating a display period corresponding to said external video window area in response to the external video window area detection signal, and means for generating a memory address for reading out the display data from the storage start position of said image memory in response to the external video window area detection signal;

means for reading out the display data from the storage start position of said image memory in accordance with the memory address generated by said second display control circuit to convert the display data into video data which is to be supplied to said display monitor; and

means for supplying the video data to said display monitor in the display period designated by the display enable signal such that the external video data is displayed in said external video window area.

15. An apparatus according to claim 14, wherein said first display control circuit displays VGA data, and said second display control circuit displays moving picture data.

16. An apparatus according to claim 15, wherein the moving picture data is MPEG data.

17. The apparatus according to claim 14, further comprising a hardware cursor display timing circuit for outputting a hardware cursor display enable signal to thereby display the hardware cursor when the coordinate address indicating a scanning position on said entire display screen area coincides with an address indicating a hardware cursor display start position.