Power factor control circuit having a boost current for increasing a speed of a voltage control loop and method therefor

• US 5,502,370 A
• Filed: 09/06/1994
• Issued: 03/26/1996
• Est. Priority Date: 09/06/1994
• Status: Expired due to Term

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Barrow, Steven M., Tisinger, Eric W., Hall, Jeff W., Alberkrack, Jade H.
• Primary Examiner(s): NGUYEN, MATTHEW VAN
• Application Number:
  US08/300,545
• Time in Patent Office: 567 Days
• Field of Search: 323/226, 323/273, 323/274, 323/282, 323/284, 363/21, 363/23, 363/25
• US Class Current: 323/284
• CPC Class Codes: H02M 1/4225 using a non-isolated boost converter
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
• CPC Class Codes: Y02P 80/10 Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier

Abstract

An integrated power factor control circuit (12) for keeping an average AC line current sinusoidal and in phase with the line voltage. The integrated power factor control circuit (12) provides a boosted DC voltage greater than the amplitude of the line voltage. A transconductance amplifier (16) provides a boosted source and sink current when an output voltage is significantly out of regulation. The boosted source and sink current of the transconductance amplifier (16) increases the speed in which the voltage control loop can react to an output voltage change and reduces the time needed to generate the regulated voltage under startup. A comparator (17) provides a boost current at start up and senses a no-load condition during normal operation. The comparator (17) senses the no-load condition and stops switching to eliminate further output charging before an out of range condition occurs.

Claims

1. An integrated power factor control circuit for making an average AC line current sinusoidal and in phase with an AC line voltage signal, the integrated power factor control circuit enabling and disabling a transistor for generating a DC output voltage from a full-wave rectified AC line voltage signal, the integrated power factor control circuit comprising:

a transconductance amplifier responsive to the DC output voltage for providing an error signal, said transconductance amplifier having a linear voltage to current response within a predetermined voltage range around the DC output voltage and providing a boosted error signal when the DC output voltage is outside said predetermined voltage range for rapidly changing the DC output voltage in a direction towards the predetermined voltage range;

a multiplier having a first input for receiving a voltage proportional to the full-wave rectified AC line voltage signal, a second input for receiving said error signal of said transconductance amplifier, and an output, said multiplier mixes said voltage proportional to the full-wave rectified AC line voltage signal and said error signal of said transconductance amplifier for generating said control signal for making the average AC line current to be sinusoidal and in phase with the AC line voltage signal; and

control means responsive to said control signal of said multiplier, a voltage control loop for regulating the DC output voltage being formed by said multiplier, transconductance amplifier, and control means wherein said boosted current of said transconductance amplifier increases a speed in which said voltage control loop responds to changes in the DC output voltage.

2. The integrated power factor control circuit as recited in claim 1 wherein said transconductance amplifier includes an inverting input coupled for receiving a voltage proportional to the DC output voltage, a non-inverting input for receiving a first reference voltage, and an output coupled to said second input of said multiplier for providing said error signal.

3. The integrated power factor control circuit as recited in claim 2 wherein said transconductance amplifier comprises:

a first boost circuit for providing a source current when said voltage proportional to the DC output voltage is less than a second reference voltage;

a second boost circuit for providing a sink current when said voltage proportional to the DC output voltage is greater than a third reference voltage; and

a transconductance amplifier stage for providing said linear voltage to current response when said voltage proportional to the DC output voltage is between said second and third reference voltages.

4. The integrated power factor control circuit as recited in claim 3 wherein said first reference voltage is greater than said second reference voltage and less than said third reference voltage.

5. The integrated power factor control circuit as recited in claim 4 wherein said predetermined voltage range around the DC output voltage in which the transconductance amplifier provides said linear voltage to current response corresponds to an input voltage range of said transconductance amplifier bounded by said second and third reference voltages.

6. The integrated power factor control circuit as recited in claim 5 further including a comparator for comparing said error signal against a fourth reference voltage, said comparator having a non-inverting input coupled for receiving said fourth reference voltage, an inverting input coupled for receiving said error signal, and a first output for providing a no-load signal when said error signal is greater than said fourth reference voltage, said control means being responsive to said no-load signal for disabling the transistor to prevent further voltage increases in the DC output voltage.

7. The integrated power factor control circuit as recited in claim 6 wherein said comparator further includes a second output for driving said second input of said multiplier to a voltage equal to said fourth reference voltage.

8. A method for increasing a response time of a voltage control loop of a power factor control circuit, the power factor control circuit providing a DC output voltage, the method comprising:

comparing a voltage corresponding to the DC output voltage against a first reference voltage and providing an error signal having a linear voltage to current response within a predetermined voltage range around the DC output voltage, the linear voltage to current response allows the voltage control loop to regulate the DC output voltage in response to said error signal; and

boosting said error signal when the DC output voltage is outside said predetermined voltage range such that a non-linear voltage to current response allows the voltage control loop to rapidly change the DC output voltage in a direction that reduces said error signal until the DC output voltage is within said predetermined voltage range wherein the linear voltage to current response is provided for regulating the DC output voltage.

9. The method as recited in claim 8 wherein said step of boosting an output current of said transconductance amplifier further includes the steps of:

comparing said voltage corresponding to the DC output voltage against a second reference voltage; and

boosting said error signal when said voltage corresponding to the DC output voltage is less than said second reference voltage such that said non-linear voltage to current response rapidly increases the DC output voltage to said predetermined voltage range.

10. The method as recited in claim 9 wherein said step of boosting an output current of said transconductance amplifier further includes the steps of:

comparing said voltage corresponding to the DC output voltage against a third reference voltage; and

boosting said error signal when said voltage corresponding to the DC output voltage is greater than a third reference voltage such that said non-linear voltage current response rapidly decreases the DC output voltage to said predetermined voltage range.

11. An integrated power factor control circuit for making an average AC line current sinusoidal and in phase with an AC line voltage signal, the integrated power factor control circuit enabling and disabling a transistor for generating a DC output voltage from a full-wave rectified AC line voltage signal, the integrated power factor control circuit comprising:

a transconductance amplifier responsive to the DC output voltage for providing an error signal, said transconductance amplifier having a linear voltage to current response within a predetermined voltage range around the DC output voltage and providing a boosted error signal when the DC output voltage is outside said predetermined voltage range for rapidly changing the DC output voltage in a direction towards the predetermined voltage range;

a multiplier having a first input for receiving a voltage proportional to the full-wave rectified AC line voltage signal, a second input for receiving said error signal of said transconductance amplifier, and an output, said multiplier mixes said voltage proportional to the full-wave rectified AC line voltage signal and said error signal of said transconductance amplifier for generating said control signal for making the average. AC line current to be sinusoidal and in phase with the AC line voltage signal;

a comparator responsive to said error signal of said transconductance amplifier for providing a no-load signal when said error signal is less than a reference signal; and

control means responsive to said control signal of said multiplier, a voltage control loop for regulating the DC output voltage being formed by said multiplier, transconductance amplifier, and control means wherein said boosted current of said transconductance amplifier increases a speed in which said voltage control loop responds to changes in the DC output voltage, said control means being responsive to said no-load signal of said comparator for disabling the transistor to prevent further increases in the DC output voltage under a no-load condition.