Temperature management for integrated circuits

• US 5,502,838 A
• Filed: 04/28/1994
• Issued: 03/26/1996
• Est. Priority Date: 04/28/1994
• Status: Expired due to Fees

• Current Assignee: PDACO LIMITED
• Original Assignee: Consilium Overseas Limited
• Inventors: Kikinis, Dan
• Primary Examiner(s): Kriess, Kevin A.
• Assistant Examiner(s): Chavis, John Q.
• Application Number:
  US08/234,344
• Time in Patent Office: 698 Days
• Field of Search: 395/550
• US Class Current: 713/501
• CPC Class Codes: G05D 23/1919 characterised by the type of controller
• CPC Class Codes: G06F 1/203 for portable computers, e.g. for laptops
• CPC Class Codes: G06F 1/206 comprising thermal management
• CPC Class Codes: H01L 27/0211 adapted for requirements of temperature
• CPC Class Codes: H04M 1/725 Cordless telephones user interfaces specially adapted therefor H04M1/724
• CPC Class Codes: H04M 3/42323 PBX's with CTI arrangements
• CPC Class Codes: H04N 2201/0049 By wire, cable or the like
• CPC Class Codes: H04N 2201/0051 Card-type connector, e.g. PCMCIA card interface
• CPC Class Codes: H04N 2201/0053 Optical, e.g. using an infrared link
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A system for controlling temperature buildup in an IC employs a temperature sensor to provide an indication of the IC temperature to a control circuit which is configured to provide an operational clock rate to the IC which is less than the system clock rate, based on a function of the temperature of the IC or its package. In one embodiment temperature sensors are implemented as solid-state circuitry within different functional areas of a single IC, such as a microprocessor, In other embodiments, operating voltage is lowered as operating frequency is lowered. In yet another embodiment temperature sensing of multiple processors in a system is provided to a controller or controllers which are configured to allocate workload between the processors as a means to limit temperature rise, as well as to lower operational clock rate and to lower operating voltage.

Claims

1. In a single integrated circuit (IC) chip having first and second functional circuits occupying distinct first and second regions of the chip, a system for selective regional temperature control, comprising:

a first temperature sensor within the region of the first functional circuit and a first clock rate adjusting circuit supplying operational frequency to the first functional circuit;

a second temperature sensor within the region of the second functional circuit and a second clock rate adjusting circuit supplying operational frequency to the second functional circuit; and

logic control circuitry connected to the first and second temperature sensors and to the first and second clock rate adjusting circuits;

wherein the logic control circuitry signals the first clock rate adjusting circuit to lower clock rate to the first functional circuit in response to increasing temperature sensed by the first temperature sensor, and signals the second clock rate adjusting circuit to lower clock rate to the second functional circuit in response to increasing temperature sensed by the second temperature sensor.

2. A system as in claim 1 wherein the single IC chip is a microprocessor.

3. A system as in claim 1 wherein the first and second temperature sensors comprise solid-state circuitry implemented in the first and second regions of the chip, respectively.

4. A system as in claim 1 further comprising power control circuitry connected to the first and second functional circuits and to the logic control circuitry, wherein the logic control circuitry adjusts voltage to the first functional circuit as a function of the clock frequency provided to the first functional circuit, and adjusts voltage to the second functional circuit as a function of the clock frequency provided to the second functional circuit.

5. A system for controlling temperature of individual microprocessors in a multiprocessor system, wherein the microprocessors are interconnected by a bus, comprising:

a first temperature sensor in contact with a first microprocessor in the multiprocessor system;

a second temperature sensor in contact with a second microprocessor in the multiprocessor system;

a bus controller connected to the bus; and

logic control circuitry connected to the first and second temperature sensors and to the bus control circuitry;

wherein the logic control circuitry monitors the temperature of the first and second microprocessors, and signals the bus controller to route microprocessor tasks preferentially to the microprocessor at the lower temperature.

6. A system as in claim 5 further comprising clock frequency adjusting circuitry connected to the logic control circuitry and to the first and second microprocessors, wherein the logic control circuitry signals the clock frequency adjusting circuitry to lower clock frequency individually to the microprocessors as a function of increasing temperature.

7. A system as in claim 6 further comprising power control circuitry connected to the first and second microprocessors and to the logic control circuitry, wherein the logic control circuitry signals the power control circuitry to lower operating voltage to microprocessors individually in conjunction with lowering clock frequency.

8. A method for selective regional temperature control in a microprocessor chip having first and second distinct functional circuits occupying distinct first and second regions of the chip respectively, comprising steps of:

(a) sensing the temperature of the first region with a first temperature sensor within the first region, and of the second region with a second temperature sensor within the second region;

(b) providing an indication of the temperature of each region to a logic control circuit connected to a clock rate adjusting circuit in turn connected to the first and second functional circuits; and

(c) altering clock rate to the first and second functional circuits individually as a function of the temperature indicated by the first and second temperature sensors respectively.

9. The method of claim 8 wherein the first and second temperature sensors comprise solid-state circuitry implemented in the first and second regions respectively.

10. The method of claim 8 further comprising a step for adjusting operating voltage provided to each functional circuit as a function of the altered clock rate.

11. A method for controlling temperature of individual microprocessors in a multiprocessor system, wherein the microprocessors are interconnected by a bus, comprising steps of:

(a) sensing temperature of individual microprocessors in the multiprocessor system;

(b) reporting the sensed temperatures to a logic control circuit; and

(c) signalling a bus controller connected to the bus to route microprocessor tasks preferentially to microprocessors at the lowest temperatures.

12. The method of claim 11 further comprising a step for lowering clock frequency to microprocessors as a function of increasing temperature.

13. The method of claim 12 further comprising a step for lowering operating voltage to microprocessors in conjunction with lowering operating clock frequency.