Void detection in metallization patterns
First Claim
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1. A method of detecting voids in a metallization pattern of a semiconductor device, which metallization pattern contains an interconnection line and a barrier layer and voids are detected in the interconnection line by measuring hot spots in the barrier layer, comprising:
- applying a current across a test section of the metallization pattern, whereby hot spots in the barrier layer cause an elevation in temperature in regions on the surface of the metallization pattern in the vicinity of the voids; and
detecting the areas of elevated temperature.
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Abstract
Voids in a metallization pattern comprising a barrier layer, such as those generated by stress migration, are detected by applying a current across a test section of the metallization pattern to generate hot spots which are detected as by employing an infrared microscope or with a liquid crystalline material.
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Citations
33 Claims
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1. A method of detecting voids in a metallization pattern of a semiconductor device, which metallization pattern contains an interconnection line and a barrier layer and voids are detected in the interconnection line by measuring hot spots in the barrier layer, comprising:
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applying a current across a test section of the metallization pattern, whereby hot spots in the barrier layer cause an elevation in temperature in regions on the surface of the metallization pattern in the vicinity of the voids; and detecting the areas of elevated temperature. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33)
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Specification