Method for fabricating thin film transistor

• US 5,504,020 A
• Filed: 09/16/1994
• Issued: 04/02/1996
• Est. Priority Date: 09/22/1993
• Status: Expired due to Term

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Morita, Tatsuo, Yoshinouchi, Atsushi, Aomori, Shigeru, Tarui, Keiji
• Primary Examiner(s): Nguyen, Tuan H.
• Application Number:
  US08/307,068
• Time in Patent Office: 564 Days
• Field of Search: 437/24, 437/937, 437/913, 437/933, 437/40, 437/28, 437/29, 437/41, 437/45, 437/911
• US Class Current: 438/162
• CPC Class Codes: H01J 2237/31701 Ion implantation
• CPC Class Codes: H01L 21/2236 from or into a plasma phase
• CPC Class Codes: H01L 21/3003 Hydrogenation or deuterisation, e.g. using atomic hydrogen from a plasma
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate

Abstract

A method for fabricating a thin film transistor includes the steps of: forming a semiconductor layer and a gate electrode on an insulating substrate with a gate insulating film interposed therebetween; and implanting an impurity element into a surface of the semiconductor layer by accelerating hydrogen ions and ions of an element of the group III or the group V of the periodic table using at least one of the gate electrode and a resist mask used for forming the gate electrode as a mask, so as to perform both formation of source and drain regions and hydrogenation of a channel region, wherein the concentration of hydrogen ions in the channel region of the semiconductor layer is regulated in the range of 1×10¹⁹ ions/cm³ to 1×10²⁰ ions/cm³.

Claims

1. A method for fabricating a thin film transistor comprising the steps of:

forming a semiconductor layer and a gate electrode on an insulating substrate with a gate insulating film interposed between the layer and the electrode; and

implanting an impurity element into a surface of the semiconductor layer by accelerating hydrogen ions and ions of an element of one of the group III and the group V of the periodic table using at least one of the gate electrode and a resist mask used for forming the gate electrode as a mask, so as to perform both formation of source and drain regions and hydrogenation of a channel region, wherein the concentration of hydrogen ions in the channel region of the semiconductor layer is regulated in the range of 1×

10¹⁹ ions/cm³ to 1×

10²⁰ ions/cm³.

2. A method for fabricating a thin film transistor according to claim 1, wherein the semiconductor layer is made of polycrystalline silicon.

3. A method for fabricating a thin film transistor according to claim 1, wherein the gate electrode is formed of a material selected from a group at least including aluminum, a metal containing aluminum, and a layered structure of aluminum and a metal other than aluminum.

4. A method for fabricating a thin film transistor according to claim 1, wherein steps of forming an insulating film, forming contact holes, depositing a metalization layer which are performed after the step of implanting the impurity element are performed at temperatures of 450°

C. or less.

5. A method for fabricating a thin film transistor comprising the steps of:

forming a semiconductor layer on an insulating substrate;

forming a gate insulating film on the semiconductor layer;

forming a gate electrode on the gate insulating film; and

implanting an impurity element into the semiconductor layer by accelerating hydrogen ions and ions of an element of one of the group III and the group V of the periodic table using the gate electrode as a mask, so as to perform both formation of source and drain regions and hydrogenation of a channel region, wherein the concentration of hydrogen ions in the channel region is regulated in the range of 1×

10¹⁹ ions/cm³ to 1×

10²⁰ ions/cm³.

6. A method for fabricating a thin film transistor according to claim 5, wherein the semiconductor layer is made of polycrystalline silicon.

7. A method for fabricating a thin film transistor according to claim 5, wherein the gate electrode is formed of a material selected from a group at least including aluminum, a metal containing aluminum, and a layered structure of aluminum and a metal other than aluminum.

8. A method for fabricating a thin film transistor according to claim 5, wherein steps of forming an insulating film, forming contact holes, and depositing a metalization layer which are performed after the step of implanting the impurity element are performed at temperatures of 450°

C. or less.

9. A method for fabricating a thin film transistor comprising the steps of:

forming a semiconductor layer on an insulating substrate;

forming a gate insulating film on the semiconductor layer;

forming a conductive thin film on the gate insulating film;

forming a resist pattern having a predetermined pattern on the conductive thin film;

forming a gate electrode and a gate electrode interconnection from the conductive thin film using the resist pattern as a mask; and

implanting an impurity element into the semiconductor layer by accelerating hydrogen ions and ions of an element of one of the group III and the group V of the periodic table using the resist pattern and the gate electrode as a mask, so as to perform both formation of source and drain regions and hydrogenation of a channel region, wherein the concentration of hydrogen ions in the channel region is regulated in the range of 1×

10¹⁹ ions/cm³ to 1×

10²⁰ ions/cm³.

10. A method for fabricating a thin film transistor according to claim 9, wherein the semiconductor layer is made of polycrystalline silicon.

11. A method for fabricating a thin film transistor according to claim 9, wherein the gate electrode is formed of a material selected from a group at least including aluminum, a metal containing aluminum, and a layered structure of aluminum and a metal other than aluminum.

12. A method for fabricating a thin film transistor according to claim 9, wherein steps of forming an insulating film, forming contact holes, and depositing a metalization layer which are performed after the step of implanting the impurity element are performed at temperatures of 450°

C. or less.