Power MOSFET in silicon carbide

• US 5,506,421 A
• Filed: 11/24/1992
• Issued: 04/09/1996
• Est. Priority Date: 11/24/1992
• Status: Expired due to Term

• Current Assignee: CREE Incorporated (Wolfspeed, Inc.)
• Original Assignee: Cree Research, Inc. (Wolfspeed, Inc.)
• Inventors: Palmour, John W.
• Primary Examiner(s): Jackson, Jerome
• Assistant Examiner(s): GUAY, JOHN FRANCIS
• Application Number:
  US07/980,753
• Time in Patent Office: 1,232 Days
• Field of Search: 257/77, 257/139, 257/339, 257/340, 257/341, 257/330, 257/495, 257/496, 257/500, 257/623, 257/626, 257/335, 257/337, 257/342
• US Class Current: 257/77
• CPC Class Codes: H01L 29/1608 Silicon carbide
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

The power metal oxide semiconductor field effect transistor (MOSFET) has a drain region, a channel region, and a source region formed of silicon carbide. The drain region has a substrate of silicon carbide of a first conductivity type and a drain-drift region of silicon carbide adjacent the substrate having the same conductivity type. The channel region is adjacent the drain-drift region and has the opposite conductivity type from the drain-drift region. The source region is adjacent the channel region and has the same conductivity type as the drain-drift region. The MOSFET also has a gate region having a gate electrode formed on a first portion of the source region, a first portion of the channel region, and a first portion of the drain region. A source electrode is formed on a second portion of the source region and a second portion of the channel region. Also, a drain electrode is formed on a second portion of the drain region.

Claims

1. A vertical power metal oxide semiconductor field effect translator (MOSFET) having a low on-resistance and a high temperature range, comprising:

a C-face substrate of silicon carbide having a first conductivity type;

a first layer of silicon carbide positioned to overlie said C-face substrate and having said first conductivity type for forming a drain-drift region;

a second layer of silicon carbide positioned to overlie said first layer and having a second conductivity type, said second layer forming a channel region;

a third layer of silicon carbide positioned to overlie said second layer and having said first conductivity type, said third layer forming a source region;

a trench formed in portions of said source and drain-draft regions and in portions of said channel region;

an insulating layer positioned to overlie said trench;

a gate electrode positioned to overlie said insulating layer;

a source electrode positioned to overlie at least a portion of said source region; and

a drain electrode positioned to overlie at least a portion of said drain region,

and wherein for a predetermined voltage being applied to said drain electrode, said drain-drift region has a thickness less than and a doping level higher than a comparable silicon MOSFET having a similar breakdown voltage for providing a low on-resistance and thereby obtain the predetermined voltage.

2. A MOSFET according to claim 1, wherein said source and drain electrodes comprise nickel.

3. A MOSFET according to claim 1, wherein said gate includes a gate contact formed of metal.

4. A vertical power MOSFET according to claim 1, further comprising a mesa edge termination of said source, said channel, and said drain-drift regions.

5. A vertical power MOSFET according to claim 1, wherein at least one of said regions of silicon carbide has a polytype selected from the group consisting of 3C, 2H, 4H, 6H, and 15R.

6. A vertical power MOSFET according to claim 1, wherein said first conductivity type comprises n-type silicon carbide and said second conductivity type comprises p-type silicon carbide.

7. A vertical power MOSFET according to claim 1, wherein said first conductivity type comprises p-type silicon carbide and said second conductivity type comprises n-type silicon carbide.

8. A vertical power MOSFET according to claim 1, wherein said channel region is doped with aluminum.

9. A vertical power MOSFET according to claim 1, wherein said channel region is doped with boron.

10. A vertical power MOSFET according to claim 1, wherein said channel region has a doping range from 2E15 to 5E18 atoms/cm³.

11. A vertical power metal oxide semiconductor field effect transistor (MOSFET) having a low on-resistance and a high temperature range, comprising:

a drain region formed of silicon carbide, said drain region having a C-face substrate of silicon carbide of a first conductivity type and a drain-drift region of silicon carbide positioned to overlie said C-face substrate having said first conductivity type;

a channel region positioned to overlie said drain-drift region formed of silicon carbide and having a second conductivity type;

a source region positioned to overlie said channel region and having said first conductivity type;

a source electrode positioned to overlie at least a first portion of said source region;

a drain electrode positioned to overlie at least a first portion of said drain region;

a trench formed in second portions of said source and drain regions and in portions of said channel region; and

a gate electrode positioned to overlie said trench and adjacent said second portions of said source and drain regions and in said portions of said channel region,

and wherein for a predetermined voltage being applied to said drain electrode, said drain-drift region has a thickness less than a doping level higher than a comparable silicon MOSFET having a similar breakdown voltage for providing a low on-resistance and thereby obtain the predetermined voltage.

12. A vertical power MOSFET according to claim 11, further comprising a mesa edge termination of said source, said channel, and said drain-drift regions.

13. A vertical power MOSFET according to claim 11, wherein said first conductivity type comprises n-type silicon carbide and said second conductivity type comprises p-type silicon carbide.

14. A vertical power MOSFET according to claim 11, wherein said first conductivity type comprises p-type silicon carbide and said second conductivity type comprises n-type silicon carbide.

15. A vertical power MOSFET according to claim 11, wherein said channel region is doped with aluminum.

16. A vertical power MOSFET according to claim 11, wherein said channel region is doped with boron.

17. A vertical power MOSFET according to claim 11, wherein said channel region has a doping range from 2E15 to 5E18 atoms/cm³.

18. A vertical power MOSFET according to claim 11, wherein said trench has a substantially U-shape.

19. A vertical power MOSFET according to claim 11, wherein said trench has a substantially V-shape.