Receiver with an AGC circuit capable of expanding a dynamic range

• US 5,507,023 A
• Filed: 06/01/1995
• Issued: 04/09/1996
• Est. Priority Date: 07/29/1993
• Status: Expired due to Fees

• Current Assignee: Japan Radio Company Limited (Nisshinbo Holdings Incorporated)
• Original Assignee: Japan Radio Company Limited (Nisshinbo Holdings Incorporated)
• Inventors: Suganuma, Gen, Higaki, Kenji, Kumagai, Yukihiko
• Primary Examiner(s): Eisenzopf, Reinhard J.
• Assistant Examiner(s): TO, DORIS HA
• Application Number:
  US08/446,032
• Time in Patent Office: 313 Days
• Field of Search: 455/234.1, 455/235.1, 455/232.1, 455/239.1, 455/240.1, 455/241.1, 455/249.1, 455/250.1, 455/251.1, 455/253.2, 455/341, 375/345, 330/138, 330/280
• US Class Current: 455/234.1
• CPC Class Codes: H03G 1/04 Modifications of control circuit to reduce distortion caused by control modifications to reduce influence of variations of internal impedance of amplifying elements caused by control H03F1/08
• CPC Class Codes: H03G 3/3052 in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver H03G3/32, H03G3/34 take precedence
• CPC Class Codes: H03G 3/3068 Circuits generating control signals for both R.F. and I.F. stages

Abstract

A receiver comprises an AGC circuit including a low noise amplifier for amplifying a reception input signal and an AGC amplifier, a level detection circuit for producing a strength indication signal indicative of an input field strength, and a demodulator. The receiver has a function of controlling a gain to keep an amplitude of a demodulator input signal at a constant level. A bias control circuit controls on and off of a bias voltage source to allow and inhibit supply of a bias voltage to the low noise amplifier when the strength indication signal has a signal level lower than and not lower than a first threshold level, respectively. When the signal level is thereafter decreased to a second threshold level lower than the first threshold level, the bias control circuit turns on the bias voltage source to supply the bias voltage. A level output circuit serves to keep the strength indication signal at a predetermined high level when the bias voltage source is turned off.

Claims

1. A receiver comprising:

a demodulator;

an AGC circuit including;

a low noise amplifier for amplifying a reception input signal,

an AGC amplifier connected to said low noise amplifier for producing an amplified signal which is used as an input signal for said demodulator, and said AGC amplifier having a controlled gain so as to keep an average amplitude of said demodulator input signal at a constant level, and

detecting means connected to said low noise amplifier and supplied with an output signal of said low noise amplifier for detecting an input field strength to produce a strength indication signal indicative of said input field strength;

a bias control circuit connected to said detecting means, said bias control circuit including means for supplying a bias voltage from a bias voltage source to said low noise amplifier when said strength indication signal from said detecting means has a signal level lower than a predetermined first threshold level, for interrupting supply of said bias voltage when said signal level of said strength indication signal increasingly reaches said first threshold level, and for allowing supply of said bias voltage when said signal level of said strength indication signal is thereafter decreased to a predetermined second threshold level lower than said first threshold level; and

a level output circuit connected to said bias control circuit for keeping said strength indication signal at a predetermined high level when supply of said bias voltage is interrupted.

2. A receiver as claimed in claim 1, wherein said bias control circuit comprises:

comparator means connected to said detecting means and having said first and said second threshold levels for comparing said signal level of said strength indication signal with said first and said second threshold levels to produce a comparison result signal, said comparison result signal having a high level when said signal level of said strength indication signal is lower than said first threshold level, a low level when said signal level of said strength indication signal increases to said first threshold level, and a high level when said signal level of said strength indication signal is thereafter decreased to said second threshold level; and

a control circuit connected to said comparator means for controlling said bias voltage source to turn on to supply said bias voltage in response to said comparison result signal of a high level and for controlling said bias voltage source to turn off to interrupt said bias voltage in response to said comparison result signal of a low level.

3. A receiver as claimed in claim 2, wherein said bias control circuit further comprises:

a switching transistor connected to said bias voltage source and to said comparator means.

4. A receiver as claimed in claim 1, wherein said level output circuit comprises:

a diode having a cathode connected to an output side of said detecting means and an anode connected to said bias control circuit.