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Circuitry and method for clamping a boost signal

  • US 5,510,749 A
  • Filed: 10/01/1993
  • Issued: 04/23/1996
  • Est. Priority Date: 10/28/1992
  • Status: Expired due to Term
First Claim
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1. A semiconductor device, comprising:

  • a power supply voltage node receiving a power supply voltage;

    boosting means for generating on a boost line a boost potential having a level higher than said power supply voltage;

    clamping means for restricting an upper limit of the potential on said boost line to the sum of the power supply voltage and one of a plurality of clamping levels; and

    clamping level control means for selecting a clamping level of said clamping means.

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