Microprocessor with single pin for memory wipe

• US 5,515,540 A
• Filed: 12/28/1993
• Issued: 05/07/1996
• Est. Priority Date: 08/27/1990
• Status: Expired due to Term

• Current Assignee: Maxim Integrated Products, Inc. (Analog Devices, Inc.)
• Original Assignee: Dallas Semiconductor Corporation (Analog Devices, Inc.)
• Inventors: Grider, Stephen N., Bolan, Michael L., Little, Wendell L.
• Primary Examiner(s): Auve, Glenn A.
• Application Number:
  US08/174,584
• Time in Patent Office: 861 Days
• Field of Search: 395/750, 380/4, 380/25, 380/50, 380/59
• US Class Current: 726/33
• CPC Class Codes: G06F 21/75 by inhibiting the analysis of circuitry or operation
• CPC Class Codes: G06F 2221/2143 Clearing memory, e.g. to prevent the data from being stolen

Abstract

A nonvolatile microcontroller (or microprocessor) with improved security against tampering, including attempts at active intrusion. According to this invention, a battery-backed microcontroller includes encryption and power management functions, and is combined with a battery and a volatile semiconductor memory (e.g. an SRAM). The microcontroller supplies power to the semiconductor memory (either from a system power supply or from the battery). When a security violation is detected, the microcontroller wipes its encryption registers, and also grounds the power-output pin to the memory. This will destroy all data in the volatile memory.

Claims

1. A nonvolatile microprocessor-controlled module, comprising:

encryption circuitry, said encryption circuitry including encryption registers;

power management circuitry having power input nodes;

a battery, said power input nodes coupled to said battery and to an external power supply terminal;

a volatile memory;

security violation detectors to detect a security violation;

a microcontroller coupled to supply power via said power management circuitry to said volatile memory and to control said encryption registers, said security violation detectors coupled to said microcontroller;

and wherein when a security violation is detected by said security violation detectors, said security violation detectors rewrite said encryption registers to a known value.

2. The nonvolatile microprocessor-controlled module of claim 1, further comprising:

said security violation detectors emit at least one security violation signal to said microcontroller;

a delay circuit coupled between said security violation detectors and said microcontroller, said delay circuit suppressing propagation of security violation detection signal(s) when said security violation detection signal(s) have a duration less than a preselected minimum duration.

3. The nonvolatile microprocessor-controlled module of claim 1, further wherein when a security violation is detected by said security violation detectors and said security violation detectors rewrite said encryption registers to a known value, said security violation detectors also cuts off power to said volatile memory.

4. The nonvolatile microprocessor-controlled module of claim 3, further wherein said security violation detectors cuts off power to said volatile memory while continuing to supply power to said encryption registers.

5. The nonvolatile microprocessor-controlled module of claim 1, wherein said volatile memory is an external memory to said microcontroller.

6. The nonvolatile microprocessor-controlled module of claim 1, wherein said volatile memory is used to store programs.

7. The nonvolatile microprocessor-controlled module of claim 1, wherein said battery is a 3 volt battery using a lithium chemistry.

8. The nonvolatile microprocessor-controlled module of claim 1, wherein said volatile memory is a CMOS SRAM.

9. The nonvolatile microprocessor-controlled module of claim 1, wherein said volatile memory is partitioned into a first memory subset and a second memory subset.

10. The nonvolatile microprocessor-controlled module of claim 1, wherein said security violation corresponds to an unauthorized tampering with specified equipment.

11. The nonvolatile microprocessor-controlled module of claim 1, further comprising:

said security violation detectors emit at least one security violation signal which is received by said encryption registers, so that said encryption registers are rewritten to a known value; and

a delay circuit between said security violation detectors and said encryption registers, said delay circuit suppressing propagation of security violation detection signal(s) emitted by said security violation detectors when said security violation detection signal(s) have a duration less than a preselected minimum duration.

12. The nonvolatile microprocessor-controlled module of claim 1, further comprising:

said security violation detectors emit at least one security violation signal which is received by said power management circuitry, so that power to said volatile memory is cut off; and

a delay circuit between said security violation detectors and said encryption registers, said delay circuit suppressing propagation of security violation detection signal(s) emitted by said security violation detectors when said security violation detection signal(s) have a duration less than a preselected minimum duration.

13. The nonvolatile microprocessor-controlled module of claim 2, further comprising:

said security violation detectors emit at least one security violation signal which is received by said power management circuitry that cuts power to said volatile memory; and

said delay circuit coupled between said security violation detectors and said power management circuitry.

14. The nonvolatile microprocessor-controlled module of claim 13, further comprising:

said security violation detectors emit at least one security violation signal which is received by said encryption registers, so that said encryption registers are rewritten to a known value; and

said delay circuit coupled between said security violation detectors and said encryption registers.