Insulated gate bipolar transistor with reverse conducting current

• US 5,519,245 A
• Filed: 05/05/1993
• Issued: 05/21/1996
• Est. Priority Date: 08/31/1989
• Status: Expired due to Term

• Current Assignee: Nippondenso Co., Ltd. (DENSO Corporation)
• Original Assignee: Nippondenso Co., Ltd. (DENSO Corporation)
• Inventors: Tokura, Norihito, Kato, Naohito, Okabe, Naoto
• Primary Examiner(s): SAADAT, MAHSHID D
• Application Number:
  US08/056,946
• Time in Patent Office: 1,112 Days
• Field of Search: 357/35, 357/37, 357/38, 257/262, 257/372, 257/373, 257/376, 257/494, 257/495, 257/605, 257/263
• US Class Current: 257/376
• CPC Class Codes: H01L 29/0834 Anode regions of thyristors or gated bipolar-mode devices, e.g. supplementary regions surrounding anode regions
• CPC Class Codes: H01L 29/7395 Vertical transistors, e.g. vertical IGBT
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An insulated gate bipolar transistor has a reverse conducting function built therein. A semiconductor layer of a first conduction type is formed on the side of a drain, a semiconductor layer of a second conduction type for causing conductivity modulation upon carrier injection is formed on the semiconductor layer of the first conduction type, a semiconductor layer of the second conduction type for taking out a reverse conducting current opposite in direction to a drain current is formed in the semiconductor layer of the second conduction type which is electrically connected to a drain electrode, and a semiconductor layer of the second conduction type is formed at or in the vicinity of a pn junction, through which carriers are given and received to cause conductivity modulation, with a high impurity concentration resulting in a path for the reverse conducting current into a pattern not impeding the passage of the carriers. Therefore, the built-in reverse conducting function has a low operating resistance, a large reverse current can be passed, there is no increase in on-resistance, and the turn-off time can be shortened.

Claims

1. An insulated gate bipolar transistor with a reverse conducting function comprising:

a first semiconductor layer of a first conduction type;

a second semiconductor layer of a second conduction type formed in contact with the first semiconductor layer at a bottom surface therebetween;

a third semiconductor region of the first conduction type formed in the second semiconductor layer and having a junction portion extending to a top surface of said second semiconductor layer;

a fourth semiconductor region of the second conduction type formed in the third semiconductor region and having a junction portion extending to said top surface of said second semiconductor layer;

an insulated gate electrode formed at least over the third semiconductor region junction portion laterally extending between the fourth semiconductor region junction portion and a non-diffused potion of said second semiconductor layer which extends to the top surface thereof;

a source electrode in contact with both the third semiconductor region and the fourth semiconductor region;

a drain electrode for supplying a drain current through the first semiconductor layer;

a fifth semiconductor region of the second conduction type which is electrically connected to the drain electrode via an external conductor, and formed within the second semiconductor layer having a junction portion extending to said top surface of the second semiconductor layer so as to pass therethrough a reverse conducting current opposite in direction to the drain current;

a sixth semiconductor region of the second conduction type formed partially at or near the bottom surface between the first semiconductor layer and the second semiconductor layer, said sixth semiconductor region having an impurity concentration higher than that of the second semiconductor layer and formed into a given pattern to reduce an electric resistance on carriers passing between the fifth semiconductor region and a portion of the second semiconductor layer at a distance from the fifth semiconductor region, said sixth semiconductor region allowing the carriers to pass across the bottom surface between the first semiconductor layer and the second semiconductor layer; and

an electrically isolated high-voltage withstand region provided between said fifth semiconductor region and an element region, said element region including at least said second semiconductor layer, said third semiconductor region and said fourth semiconductor region, said high-voltage withstand region providing a high voltage withstand barrier against high voltages produced in an end area of said element region,

said sixth semiconductor region being provided below at least said element region and said high-voltage withstand region, and said given pattern of said sixth semiconductor region being such that at least a part of said sixth semiconductor region extends continuously from a portion below said element region to a portion below said high-voltage withstand region.

2. An insulated gate bipolar transistor according to claim 1, wherein the sixth semiconductor region pattern provides contact portions and non-contact portions between the first and second semiconductor layers, said non-contact portions for passing the carriers therethrough when said transistor is active.

3. An insulated gate bipolar transistor according to claim 2, wherein the sixth semiconductor region pattern is a mesh pattern or a striped pattern and is formed at least relative to a region confronting the third semiconductor region.

4. An insulated gate bipolar transistor according to claim 1, wherein the sixth semiconductor region pattern is formed entirely in the first semiconductor layer at a close distance from the bottom surface of the second semiconductor layer, the distance being smaller than a diffusion length of minority carriers in the first semiconductor layer such that majority carriers pass between the first and second semiconductor layers.

5. An insulated gate bipolar transistor according to claim 4, wherein the sixth semiconductor region pattern is a mesh pattern or a striped pattern and is formed at least relative to a region confronting the third semiconductor region.

6. An insulated gate bipolar transistor according to claim 1, wherein the sixth semiconductor region pattern is a mesh pattern or a striped pattern and is formed at least relative to a region confronting the third semiconductor region.

7. An insulated gate bipolar transistor according to claim 6, wherein the fifth semiconductor region is formed along a peripheral surface portion of the second semiconductor layer.

8. An insulated gate bipolar transistor according to claim 7, wherein the sixth semiconductor region pattern is formed so as to spread up to a region confronting the fifth semiconductor region formed along the peripheral surface portion of the second semiconductor layer.

9. An insulated gate bipolar transistor according to claim 7, wherein the sixth semiconductor region pattern is p⁺ layer 11 (where the n layer 23 is present) as to formed so as to spread up to a region confronting both the fifth semiconductor region and the high-voltage withstand region.

10. An insulated gate bipolar transistor according to claim 9, wherein said high-voltage withstand region includes a guard ring.

11. An insulated gate bipolar transistor according to claim 1, wherein the fifth semiconductor region is formed along a peripheral surface portion of the second semiconductor layer.

12. An insulated gate bipolar transistor according to claim 11, wherein the sixth semiconductor region pattern is formed so as to spread up to a region confronting the fifth semiconductor region formed along the peripheral surface portion of the second semiconductor layer.

13. An insulated gate bipolar transistor according to claim 12, wherein the fifth semiconductor region totally confronts the sixth semiconductor region at a corresponding overlapping portion thereof.

14. An insulated gate bipolar transistor according to claim 1, wherein said high-voltage withstand region includes a guard ring.

15. An insulated gate bipolar transistor according to claim 1, wherein said sixth semiconductor region is also provided below said fifth semiconductor region.

16. An insulated gate bipolar transistor with a reverse conducting function comprising:

a first semiconductor layer of a first conduction type;

a second semiconductor layer of a second conduction type formed in contact with the first semiconductor layer at a bottom surface therebetween;

a third semiconductor region of the first conduction type formed in the second semiconductor layer and having a junction portion extending to a top surface of said second semiconductor layer;

a fourth semiconductor region of the second conduction type formed in the third semiconductor region and having a junction portion extending to said top surface of said second semiconductor layer;

an insulated gate electrode formed at least over the third semiconductor region junction portion laterally extending between the fourth semiconductor region junction portion and a non-diffused potion of said second semiconductor layer which extends to the top surface thereof;

a source electrode in contact with both the third semiconductor region and the fourth semiconductor region;

a drain electrode for supplying a drain current through the first semiconductor layer;

a fifth semiconductor region of the second conduction type which is electrically connected to the drain electrode via an external conductor, and formed within the second semiconductor layer having a junction portion extending to said top surface of the second semiconductor layer so as to pass therethrough a reverse conducting current opposite in direction to the drain current;

a sixth semiconductor region of the second conduction type formed partially at or near the bottom surface between the first semiconductor layer and the second semiconductor layer, said sixth semiconductor region having an impurity concentration higher than that of the second semiconductor layer and formed into a given pattern to reduce an electric resistance on carriers passing between the fifth semiconductor region and a portion of the second semiconductor layer at a distance from the fifth semiconductor region, said sixth semiconductor region allowing the carriers to pass across the bottom surface between the first semiconductor layer and the second semiconductor layer; and

an electrically isolated high-voltage withstand region provided between said fifth semiconductor region and an element region, said element region including at least said second semiconductor layer, said third semiconductor region and said fourth semiconductor region, said high-voltage withstand region providing a high voltage withstand barrier against high voltages produced in an end area of said element region,

said sixth semiconductor region being provided below at least said element region and said high-voltage withstand region, and said given pattern of said sixth semiconductor region being such that at least a part of said sixth semiconductor region extends continuously from a portion below said element region to a portion below said high-voltage withstand region.

17. An insulated gate bipolar transistor according to claim 16, wherein the sixth semiconductor region pattern provides contact portions and non-contact portions between the first and second semiconductor layers, said non-contact portions for passing the carriers therethrough when said transistor is active.

18. An insulated gate bipolar transistor according to claim 16, wherein the sixth semiconductor region pattern is formed entirely in the first semiconductor layer at a close distance from the bottom surface of the second semiconductor layer, the distance being smaller than a diffusion length of minority carriers in the first semiconductor layer such that majority carriers pass between the first and second semiconductor layers.

19. An insulated gate bipolar transistor according to claim 16, wherein the sixth semiconductor region pattern is a mesh pattern or a striped pattern and is formed at least relative to a region confronting the third semiconductor region.

20. An insulated gate bipolar transistor according to claim 16, wherein the fifth semiconductor region is formed along a peripheral surface portion of the second semiconductor layer.

21. An insulated gate bipolar transistor according to claim 20, wherein the sixth semiconductor region pattern is formed so as to spread up to a region confronting the fifth semiconductor region formed along the peripheral surface portion of the second semiconductor layer.

22. An insulated gate bipolar transistor according to claim 21, wherein the fifth semiconductor region totally confronts the sixth semiconductor region at a corresponding overlapping portion thereof.

23. An insulated gate bipolar transistor according to claim 16, wherein said high-voltage withstand region includes a guard ring.

24. An insulated gate bipolar transistor according to claim 16, wherein said sixth semiconductor region is also provided below said fifth semiconductor region.

25. An insulated gate bipolar transistor with a reverse conducting function comprising:

a first semiconductor layer of a first conductivity type;

a second semiconductor layer of a second conductivity type which is in contact with the first semiconductor layer;

a third semiconductor region of the first conductivity type which is formed in the second semiconductor layer such that junction portion thereof terminates at a surface of the second semiconductor layer;

a fourth semiconductor region of the second conductivity type which is formed in the third semiconductor region such that junction portion thereof terminates at a surface of the third semiconductor region;

a gate electrode formed on at least a channel region defined in the surface of the third semiconductor region between the second semiconductor layer and the fourth semiconductor region with a gate insulating film interposed therebetween;

a source electrode contacting with both the third semiconductor region and the fourth semiconductor region;

a drain electrode for supply of a drain current through the first semiconductor layer;

a fifth semiconductor region of the second conductivity type which is electrically connected to the drain electrode and formed in a given surface region within the second semiconductor layer, so as to pass therethrough a reverse conducting current opposite in direction to the drain current;

a high-voltage withstand region for ensuring a high withstand voltage provided between the fifth semiconductor region and an element region, the element region including at least the third semiconductor region, the fourth semiconductor region and the gate electrode; and

a sixth semiconductor region of the second conductivity type which is formed at or in the vicinity of the interface between the first semiconductor layer and the second semiconductor layer and is provided below at least the element region and the high-voltage withstand region, the sixth semiconductor region having an impurity concentration higher than that of the second semiconductor layer and formed into a given pattern having an extending part extending from the element region to the high-voltage withstand region and windows which are located at least below the element region to allow majority carriers in the first semiconductor layer to pass therethrough, whereby an electric resistance on carriers passing between the fifth semiconductor region and a portion of the second semiconductor layer at a distance from the fifth semiconductor region is reduced but carriers injection between the first semiconductor layer and the second semiconductor layer is allowed.

26. An insulated gate bipolar transistor according to claim 25, wherein the given pattern of the sixth semiconductor region provides contact portions and non-contact portions between the first and second semiconductor layers, whereby the contact portions allows the carriers injection between the first semiconductor layer and the second semiconductor layer.

27. An insulated gate bipolar transistor according to claim 25, wherein the sixth semiconductor region is entirely formed in the first semiconductor layer at a close distance from the interface between the first semiconductor layer and the second semiconductor layer, the close distance being smaller than a diffusion length of minority carriers in the first semiconductor layer.

28. An insulated gate bipolar transistor according to claim 25, wherein the given pattern is a mesh pattern at least below the third semiconductor region.

29. An insulated gate bipolar transistor according to claim 25, wherein the given pattern is a strip pattern at least below the third semiconductor region.

30. An insulated gate bipolar transistor according to claim 25, wherein the fifth semiconductor region is formed along a peripheral surface portion of the second semiconductor layer.

31. An insulated gate bipolar transistor according to claim 25, wherein the sixth semiconductor region is disposed so as to extend from the element region to a region which is below the fifth semiconductor region.

32. An insulated gate bipolar transistor according to claim 31, wherein the region below the fifth semiconductor region is thoroughly covered with the sixth semiconductor region.

33. An insulated gate bipolar transistor according to claim 31, wherein the sixth semiconductor region thoroughly covers a region below both the fifth semiconductor region and the high-voltage withstand region.

34. An insulated gate bipolar transistor according to claim 25, wherein said high-voltage withstand region includes a guard ring.

35. An insulated gate bipolar transistor according to claim 25, wherein the given pattern is a mesh pattern at least below the element region.

36. An insulated gate bipolar transistor according to claim 25, wherein the given pattern is a strip pattern at least below the element region.

37. An insulated gate bipolar transistor according to claim 25, wherein the fifth semiconductor region is formed in a peripheral region which surrounds the element region with the high-voltage withstand region disposed therebetween.