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Method for electrically characterizing the insulator in SOI devices

  • US 5,519,336 A
  • Filed: 12/06/1994
  • Issued: 05/21/1996
  • Est. Priority Date: 03/03/1992
  • Status: Expired due to Term
First Claim
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1. A method of determining electrical characteristics of the top silicon to insulator interface in a silicon on insulator (SOI) wafer having a top silicon layer, a buried oxide layer and a silicon substrate, wherein said buried oxide layer is located between said top silicon layer and said silicon substrate, comprising the following steps:

  • providing a silicon island in said top silicon layer;

    providing a first electrical connection to said silicon substrate to serve as a gate terminal;

    providing a second electrical probe connection to a designated drain region in said silicon island;

    providing a third electrical probe connection to a designated source region in said silicon island;

    applying a first variable gate voltage to said gate terminal;

    performing a first series of measurements of drain current as a function of said first variable gate voltage; and

    evaluating said first series of measurements of drain current to determine said electrical characteristics.

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