Non-volatile disk cache

• US 5,519,831 A
• Filed: 06/01/1994
• Issued: 05/21/1996
• Est. Priority Date: 06/12/1991
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Holzhammer, Gerald S.
• Primary Examiner(s): Beausoliel, Jr., Robert W.
• Assistant Examiner(s): Decady, Albert
• Application Number:
  US08/252,619
• Time in Patent Office: 720 Days
• Field of Search: 395/575, 395/403, 395/468, 395/469, 395/488, 395/182.2, 365/228, 365/229, 371/66
• US Class Current: 714/22
• CPC Class Codes: G06F 11/1441 Resetting or repowering
• CPC Class Codes: G06F 11/2015 Redundant power supplies power supply failure G06F1/30

Abstract

A method and apparatus in a computer system for storing data from a volatile cache during a power loss. The apparatus comprises a volatile cache memory and a non-volatile memory. In a preferred embodiment, the non-volatile memory is an electrically erasable programmable read-only memory. The device further comprises power loss detection logic which detects the power loss in the computer system and copy control logic which copies the data contained in the volatile cache memory to the non-volatile memory upon detection of the power loss. The copy control logic is coupled to the volatile cache, the non-volatile memory, and the power loss detection logic. In a preferred embodiment, the copy control logic and the power loss detection logic comprise a microcontroller. The device lastly comprises a power source coupled to the volatile cache memory and the copy control logic, the power source being independent of the computer system power. In a preferred embodiment, the power source comprises a battery coupled to the microcontroller and the volatile and non-volatile memories. Methods are provided to copy to and restore data from a non-volatile memory when computer system power is lost or restored.

Claims

1. An apparatus in a computer system for storing data from a volatile cache during a power loss in the computer system comprising:

a. a volatile cache memory;

b. an electrically erasable programmable read-only memory (EEPROM) for receiving the contents of said volatile cache memory during said power loss;

c. a means for detecting the power loss in the computer system;

d. a means for copying the data contained in the volatile cache memory to the EEPROM upon detection of the power loss, wherein the means for copying copies only the data which has not been written-back to a device coupled to the volatile cache memory, the copying means coupled to the volatile cache memory, the EEPROM, and the detecting means; and

e. a means for powering coupled to the volatile cache memory and the copying means, the means for powering being independent of the computer system power wherein said means for powering has sufficient capacity to power said volatile cache memory and said copying means for the duration of an operation to copy the contents of said volatile cache memory to said EEPROM upon said detection of said power loss.

2. The apparatus of claim 1 wherein the detecting means for the power loss in the computer system comprises a microcontroller.

3. The apparatus of claim 1 wherein the copying means comprises a microcontroller.

4. The apparatus of claim 1 wherein the powering means comprises a battery.

5. The apparatus of claim 1 wherein the powering means comprises a circuit which ceases providing power to the volatile cache memory and the copying means upon completion of the operation to copy the contents of the volatile cache memory to the EEPROM.

6. A method of restoring the data contained in an electrically erasable programmable read-only memory (EEPROM) to a computer system device coupled to a computer system comprising:

a. determining a last location in the EEPROM at which valid device data resided;

b. writing to the device all data starting at the last location which was modified but not written to the device contained in the EEPROM;

c. determining whether there is sufficient memory in the EEPROM to store additional data from a volatile cache memory coupled to the EEPROM, and if there is not, erasing the EEPROM; and

d. determining whether the number of erasures of the EEPROM has exceeded a first value, and if it has, inhibiting the computer system from writing to the EEPROM.

7. An apparatus for use in a computer system comprising:

a. a volatile cache memory;

b. a non-volatile memory for receiving data contained in said volatile cache memory during a power interruption;

c. a detection circuit for detecting said power interruption in said computer system;

d. a copying circuit coupled to said volatile cache, said non-volatile memory, and said detection circuit, said copying circuit for copying a first set of data contained in said volatile cache memory to said non-volatile memory upon detection of said power interruption, wherein said first set of data includes only data that has not been written-back to a device coupled to said volatile cache memory; and

e. a power circuit coupled to said volatile cache memory, said non-volatile memory and said copying circuit, said power circuit being independent of said computer system power and having sufficient capacity to power said volatile cache memory and said copying circuit for the duration of an operation to copy said first set of data contained in said volatile cache memory to said non-volatile memory upon said detection of said power interruption.

8. The apparatus of claim 7 further comprising a restoration circuit coupled to said volatile cache memory and said non-volatile memory for restoring said data to said volatile cache memory from said non-volatile memory upon a restoration of power in said computer system.

9. The apparatus of claim 7 wherein said non-volatile memory is an electrically erasable programmable read-only memory (EEPROM).

10. The apparatus of claim 9 further comprising a cycle count circuit for retaining the number of cycles said contents of said volatile cache memory has been copied to said EEPROM.

11. A computer system comprising:

a. a volatile cache memory;

b. a non-volatile memory for receiving contents of said volatile cache memory during a power interruption;

c. a detection circuit for detecting said power interruption in said computer system;

d. a copying circuit coupled to said volatile cache, said non-volatile memory, and said detection circuit, said copying circuit for copying said contents contained in said volatile cache memory to said non-volatile memory upon detection of said power interruption, wherein said copying circuit copies only contents of said volatile cache memory which have not been written-back to a device coupled to said volatile cache memory; and

e. a power circuit coupled to said volatile cache memory, said non-volatile memory and said copying circuit, said power circuit being independent of said computer system power and having sufficient capacity to power said volatile cache memory and said copying circuit for the duration of an operation to copy said contents of said volatile cache memory to said non-volatile memory upon said detection of said power interruption.

12. The computer system of claim 11 further comprising a restoration circuit coupled to said volatile cache memory and said non-volatile memory restoring said contents of said volatile cache memory from said non-volatile memory upon a restoration of power in said computer system.

13. The computer system of claim 11 wherein said non-volatile memory is an electrically erasable programmable read-only memory (EEPROM).

14. The computer system of claim 13 further comprising a cycle count circuit for retaining the number of cycles said contents of said volatile cache memory has been copied to said EEPROM.

15. A method in a computer system of storing the data contained in a volatile cache for a device coupled to the computer system to an electrically erasable programmable read-only memory (EEPROM) upon losing computer system power comprising the following steps:

a. detecting a power loss in the computer system;

b. determining a first location in the EEPROM, the first location being the last location in the EEPROM at which data was written; and

c. writing a first set of data from the volatile cache into the EEPROM starting at the last location, the first set of data comprising only data which has been modified but has not been written to the device.

16. The method of claim 15 wherein the step of detecting comprises determining whether the computer system power has been lost for a first duration of time.

17. The method of claim 16 wherein the first duration of time is sufficient to allow all data contained in the volatile cache to be copied to the non-volatile memory.

18. The method of claim 15 further comprising the following steps if the computer system power is restored:

a. determining a last location in the EEPROM at which valid data resided;

b. writing the first set of data to the device;

c. determining whether there is sufficient memory in the EEPROM to store a second set of data, and if there is not, erasing the EEPROM; and

d. determining whether the number of erasures of the EEPROM has exceeded a first value, and if it has, inhibiting the computer system from writing to the EEPROM.