Manufacturing defect analyzer

• US 5,521,513 A
• Filed: 10/25/1994
• Issued: 05/28/1996
• Est. Priority Date: 10/25/1994
• Status: Expired due to Term

• Current Assignee: Philip J. Stringer
• Original Assignee: Philip J. Stringer
• Inventors: Stringer, Philip J.
• Primary Examiner(s): Karlsen, Ernest F.
• Application Number:
  US08/329,031
• Time in Patent Office: 581 Days
• Field of Search: 324/537, 324/527, 324/765, 324/766, 371/15.1
• US Class Current: 324/537
• CPC Class Codes: G01R 31/2806 Apparatus therefor, e.g. test stations, drivers, analysers, conveyors G01R31/2805, G01R31/281, G01R31/2818 take precedence
• CPC Class Codes: G01R 31/2834 Automated test systems [ATE]; using microprocessors or computers G01R31/317 takes precedence; ATE for detection of defective computer hardware G06F11/2736

Abstract

A method for detecting faults on a printed circuit board populated with semiconductor electronic components. To detect faults, signal pins on the components are taken in pairs. The an indication of the common mode resistance between those pins and ground is computed from a series of current measurements. An error is detected when the common mode resistance is outside of a predetermined range. A "learn mode" is also disclosed in which the pairs of leads used for the test are selected by taking measurements on a known good board without detailed knowledge of the semiconductor components on the board.

Claims

1. A method of detecting open circuits on a printed circuit board populated by a plurality of components, each having a plurality of signal leads and at least one ground lead connected to conductive traces on the printed circuit board, said method comprising:

a) connecting one terminal of a voltage source to the ground lead and the second terminal of the voltage source to two signal leads and measuring the current flow through the voltage source while applying a predetermined voltage level;

b) connecting one terminal of the voltage source to the ground lead and the second terminal to a first of the two signal leads and measuring the current flow through the voltage source while applying the predetermined voltage level;

c) connecting one terminal of the voltage source to the ground lead and the second terminal to the second of the two signal leads and measuring the current flow through the voltage source while applying the predetermined voltage level;

d) computing an indication of the common mode resistance between the two signal leads and the ground lead; and

e) indicating a defect when the indication of the common mode resistance is outside of a predetermined range.

2. The method of claim 1 wherein the indication of common mode resistance is computed by computing the difference between the current measured at step (a) and the sum of the currents measured at steps (b) and (c).

3. The method of claim 2 wherein the step of indicating a defect comprises indicating an open circuit fault when the computed indication is below a predetermined threshold.

4. The method of claim 1 wherein the three recited steps of connecting a voltage source comprise connecting the same voltage source.

5. The method of claim 4 wherein the three recited steps of connecting comprise connecting a voltage source to the printed circuit board through a bed of nails fixture.

6. The method of claim 1 additionally comprising repeating steps (a) through (e) for a plurality of pairs of signal leads on a plurality of components mounted to the printed circuit board.

7. The method of claim 6 wherein the predetermined voltage is changed to make current measurements for the pairs of signal leads on a portion of the plurality of components mounted to the printed circuit board.

8. A method of detecting open circuits on a printed circuit board populated by a plurality of components, each having a plurality of signal leads and at least one ground lead connected to conductive traces on the printed circuit board, said method comprising:

a) connecting one terminal of a voltage source to the ground lead and the second terminal of the voltage source to two signal leads and measuring the current flow through the voltage source while applying a predetermined voltage level;

b) connecting one terminal of a voltage source to the ground lead and the second terminal to a first of the two signal leads and measuring the current flow through the voltage source while applying the predetermined voltage level;

c) connecting one terminal of a voltage source to the ground lead and the second terminal to the second of the two signal leads and measuring the current flow through the voltage source while applying the predetermined voltage level;

d) computing the difference between the current measured at step (a) and the sum of the currents measured at steps (b) and (c); and

e) indicating a defect when the computed difference is outside of a predetermined range.

9. The method of claim 8 wherein the voltage sources connected in steps a), b) and c) have a voltage level determined in advance by measuring changes in current flow on a known good printed circuit board in response to application of varying levels of applied voltage.

10. The method of detecting open circuits on a printed circuit board by repeating the steps of claim 8 for pairs of signal leads on multiple components on the printed circuit board.

11. The method of claim 10 additionally comprising the preliminary step of grouping signal leads on multiple components into pairs of leads, the signal leads in each pair being connected to different components through traces on the printed circuit board.