Method for low temperature growth of epitaxial silicon and devices produced thereby

• US 5,523,587 A
• Filed: 06/24/1993
• Issued: 06/04/1996
• Est. Priority Date: 06/24/1993
• Status: Expired due to Term

• Current Assignee: AT&T IPM Corp. (AT&T, Inc.)
• Original Assignee: AT&T Corporation (AT&T, Inc.)
• Inventors: Kwo, Jueinai R.
• Primary Examiner(s): Jackson, Jerome
• Assistant Examiner(s): GUAY, JOHN FRANCIS
• Application Number:
  US08/082,194
• Time in Patent Office: 1,076 Days
• Field of Search: 257/64, 257/72, 257/627, 257/347
• US Class Current: 257/64
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 21/02422 Non-crystalline insulating materials, e.g. glass, polymers
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02516 Crystal orientation
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: Y10S 438/967 Semiconductor on specified insulator

Abstract

In accordance with the invention, a thin layer of epitaxial silicon is grown at low temperatures at or below 300° C. by the steps of providing a substrate, forming an oriented dielectric buffer layer on the substrate and growing epitaxial silicon on the buffer layer. Preferably the substrate has a glass surface and the oriented buffer layer is cubic ZrO₂. The buffer layer is preferably oriented by bombarding it with a directed ion beam while the buffer layer is being deposited on the substrate. For example, a buffer layer of (100) cubic ZrO₂ can be grown at a temperature as low as 300° C. The oriented cubic ZrO₂ is an excellent buffer for epitaxial silicon on glass due to a good match of lattice parameters with silicon and a good match of thermal expansion coefficients with glass. An oriented (100) silicon epitaxial film can then be grown on the epitaxial template provided by the buffer layer at a temperature as low as 250° C. This low temperature process for producing epitaxial films offers multiple advantages: (1) reduced silicon interfacial defect densities and enlarged grain size permitting improved thin film transistor performance due to a lowered "off" current; (2) higher electron mobility permitting the fabrication of integrated displays; (3) lower temperature processing permitting the use of inexpensive glass substrates such as borosilicates; (4) sufficiently low temperature processing to permit the use of new lightweight substrates such as glass-coated polymeric materials (glass-coated plastics) which can substantially reduce the weight of displays and thus enhance the portability of portable computers, video telephones, and personal communicators; and (5) the use of new buffer layers such as ZrO₂ which can block the diffusion of Na ions from the substrate.

Claims

1. A silicon device comprising:

a substrate comprising a body of material having a planar major surface and a layer of glass overlying said major surface;

overlying said glass layer a (100) oriented buffer layer of dielectric material; and

overlying said buffer layer a (100) oriented layer of silicon.

2. A device according to claim 1 wherein said substrate is transparent to visible light.

3. A device according to claim 1 wherein said body comprises a body of polymeric material.

4. A device according to claim 3 wherein said polymeric material is a polyimide or a polyethersulfone.

5. A device according to claim 1 wherein said buffer layer comprises ZrO₂ ,CeO₂ ,PRO₂ or Y₂ O₃.

6. A thin film transistor comprising a source, a gate-controlled channel and a drain disposed upon a substrate having a planar major surface wherein said source, channel and drain comprise a layer of (100) oriented silicon overlying said planar major surface and said substrate comprises a body of polymeric material and a layer of glass overlying said body of polymeric material, said transistor further comprising a buffer layer of (100) oriented dielectric material disposed between said layer of glass and said layer of silicon.

7. A liquid crystal display comprising a common electrode, a liquid crystal medium, and a plurality of transistor-controlled local electrodes for controlling local regions of the liquid crystal medium wherein one or more of the transistors for controlling said local electrodes comprises a transistor in accordance with claim 6.