Method and apparatus for serial transmission and/or reception of nonsynchronous, multiplexed signals
DCFirst Claim
1. A method for transmission of multiplexed signals as serial data obtained by multiplexing a first digital sample signal of a continuous signal with a second digital sample signal, said method comprising the steps of:
- generating an address based on a clock signal of said second digital sample signal;
sampling the generated address by the use of a sampling clock signal of said continuous signal to produce a sampled address value; and
transmitting the multiplexed signals inclusive of the sampled address value inserted therein.
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Abstract
A method and an apparatus capable of transmitting and receiving multiplexed signals as serial data in such a manner that, even in a state where a continuous signal such as an audio digital signal is not in synchronism with another signal such as a video digital signal, the continuous signal can be properly reproduced on a reception side. Address data based on a word clock of another digital signal is sampled on a transmission side in accordance with a sampling clock of the continuous signal, and the sampled address value is included in the multiplexed signals to be thereby transmitted together to the reception side. Then on the reception side, a word clock synchronously locked to the word clock of the transmission-side another digital signal is reproduced from the received serial data, and address data is generated on the basis of the reproduced word clock, so that the reception-side clock of the continuous signal is reproduced from the generated address data and the transmitted address value included in the multiplexed signals, whereby the continuous signal is reproduced in accordance with the clock thus reproduced.
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Citations
11 Claims
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1. A method for transmission of multiplexed signals as serial data obtained by multiplexing a first digital sample signal of a continuous signal with a second digital sample signal, said method comprising the steps of:
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generating an address based on a clock signal of said second digital sample signal; sampling the generated address by the use of a sampling clock signal of said continuous signal to produce a sampled address value; and transmitting the multiplexed signals inclusive of the sampled address value inserted therein. - View Dependent Claims (2, 3, 4)
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5. An apparatus for transmission of multiplexed signals as serial data obtained by multiplexing a first digital sample signal of a continuous signal with a second digital sample signal, said apparatus comprising:
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a circuit for generating an address based on a clock signal of said second digital sample signal; a circuit for sampling the generated address by the use of a sampling clock signal of said continuous signal to produce a sampled address value; a circuit for inserting the sampled address value into said multiplexed signals; and a circuit for converting said multiplexed signals, where the address value is inserted, into serial data for transmitting the same. - View Dependent Claims (6, 7, 8)
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9. An apparatus for transmitting and receiving multiplexed signals as serial data obtained by multiplexing a first digital sample signal of a continuous signal with a second digital sample signal, said apparatus comprising:
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a circuit for generating a word address based on a word clock signal of said second digital sample signal; a circuit for sampling the generated word address in accordance with the sampling clock signal of said continuous signal to produce a word address value; a circuit for inserting the word address value into said multiplexed signals; a circuit for converting said multiplexed signals, where the word address value is inserted, into serial data for transmitting the same; a circuit for receiving the serial data and separating the received serial data into said first digital sample signal of the continuous signal, said second digital sample signal and said word address value; a circuit for reproducing a first word clock signal synchronized with a word clock signal of said second digital sample signal; a circuit for generating word address data on the basis of the reproduced first word clock signal; a comparator circuit for comparing the generated word address data with the word address value of the received serial data; a circuit for generating a second word clock signal for reproduction of said continuous signal on the basis of the output of said comparator circuit; and a circuit for reproducing said continuous signal in accordance with the generated second word clock signal. - View Dependent Claims (10, 11)
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Specification