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DMD architecture and timing for use in a pulse-width modulated display system

  • US 5,523,803 A
  • Filed: 06/08/1994
  • Issued: 06/04/1996
  • Est. Priority Date: 04/01/1991
  • Status: Expired due to Term
First Claim
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1. A projection system comprising:

  • a. a decimation processor comprising at least one input shift register, at least one shadow memory connected to said input shift register, and at least one output shift register connected to said shadow memory;

    b. at least one memory cell array for receiving data from said output shift register; and

    c. a spatial light modulator for receiving data from said memory cell array.

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