Method and apparatus for transmitting an unique high rate digital data flow over N multiple different independent digital communication channels between two different primary terminal adapters

• US 5,524,111 A
• Filed: 02/07/1994
• Issued: 06/04/1996
• Est. Priority Date: 03/02/1993
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Spatari, Joseph, Le Pennec, Jean-Francois, Michel, Patrick, Sicsic, Patrick
• Primary Examiner(s): Chin, Wellington
• Application Number:
  US08/192,516
• Time in Patent Office: 848 Days
• Field of Search: 370/60, 370/60.1, 370/94.1, 370/94.2, 370/110.1, 370/84, 370/95.1, 370/95.3, 370/112, 375/37, 375/38, 375/260, 375/267
• US Class Current: 370/465
• CPC Class Codes: H04L 25/14 Channel dividing arrangements , i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver
• CPC Class Codes: H04Q 11/0407 using a stored programme control

Abstract

Method for transmitting a unique high-rate digital data flow over n multiple different independent digital communication channels between two different primary terminal adapters. The method involves the steps of establishing, on request of a first DTE to a second remote DTE, a set of n independent digital communication channels between said terminal adapters and determining, during an initialization phase, the relationship between the slot of each channel used for the building of an aggregation superchannel and the chronologic order of the establishment of the considered slot. Then, the high-rate digital data flow is separated into bytes and each byte is transmitted through the independent digital channels in accordance with the chronologic order which was previously assigned to each of the said channels. In the remote DTE, each byte of the separated high-rate data flow is received through the different independent digital channel and is loaded in a single memory at an address which is computed from the following formula:

A(n)=A(n-1)+n

Where A(n-1) corresponds to the address in which the preceding byte conveyed through the considered channel is stored, and n corresponds to the number of digital channels established. Therefore, each channel works independently and there is no need to measure any delay between the channels. The memory storage will contain at continuous addresses the high-rate data flow. Applied to an ISDN, fractional T1 or multi-channel E1, the method provides an aggregate link operating a nx64 kpbs.

Claims

1. Method for transmitting a unique high rate digital data flow over n different independent digital communication channels, n being an integer greater than 1, between two different primary terminal adapters, said method involving the steps of:

establishing, on request of a first DTE to a first remote DTE, a set of n different independent digital communication channels between said two different primary terminal adapters;

determining, during an initialization phase, the relationship between the slot of each channel used for the building of an aggregation superchannel and the chronologic order of the establishment of said channels;

splitting the unique high rate digital data flow into bytes;

transmitting each byte of said unique high rate digital data flow through said set of n different independent digital communication channels in accordance with the chronologic order assigned to each of said set of n different independent digital communication channels;

storing in said first remote DTE each byte of said high-rate digital data flow received from each of said set of n different independent digital communication channels in one single memory storage at an address which is computed in accordance with the formula;

space="preserve" listing-type="equation">A(n)=A(n-1)+n

Where A(n-1) corresponds to the address in which the preceding byte conveyed through one of the n different digital communication channels is stored, and n corresponds to the number of digital channels established.

2. Method according to claim 1 characterized in that said initializing phase further involves the steps of:

for each of the set of n different independent digital communication channels;

transmitting a first initialization frame from the first DTE, said first initialization frame comprising a header and a data representative of a request to build the aggregation superchannel,

in response to the reception of said first initialization frame in said first remote DTE, transmitting back to said first DTE a second initialization frame said second initialization frame comprising a header and a data representative of an acknowledgment that said first remote DTE has received said first initialization frame;

in response to the reception of said second initialization frame in said first DTE, transmitting to said first remote DTE a third initialization frame comprising a header and a data representative of the chronologic order of the establishment of the set of n different independent digital communication channels;

in response to the reception of said third initialization frame in said first remote DTE, transmitting to said first DTE a fourth initialization frame comprising a header, data representative of an acknowledgment that said first remote DTE has received said third frame and further comprising said data representative of said chronologic order;

and in both the first DTE and first remote DTE,

providing a relationship between each of the set of n different independent digital communication channels and the chronologic order of its establishment during the initialization phase.

3. Method according to claim 2 characterized in that said first initialization frame includes in a first synchronization byte located between two HDLC or SDLC flags.

4. Method according to claim 3 characterized in that said second initialization frame consists in a second synchronization byte which is located between two HDLC or SDLC flags.

5. Method according to claim 4 characterized in that said third initialization frame consists in a third synchronization byte which is located between two HDLC or SDLC flags.

6. Method according to claim 5 characterized in that said fourth initialization frame consists in a fourth synchronization byte which is located between two HDLC or SDLC flags.

7. Method according to anyone of claims 1 to 6 characterized in that it is applied to an ISDN, a fractional T1 or a multi-channel E1 digital network in order to provide multiple digital links operating at n times 64 kbps.

8. Apparatus for connecting a data terminal equipment DTE to a digital communication network which provides multiple independent communication channels, said apparatus includes:

a transmit part including means for establishing, on request of a first DTE to a first remote DTE, a set a n independent digital communication channels between said first DTE and said remote DTE;

memory storage (160) for storing data to be transmitted and to be received through said set of n independent digital communication channels,

means for determining, during an initialization phase, the relationship between the slot of each of the set of n independent digital communication channels used for building of an aggregation superchannel and the chronologic order of the establishment of said each set of n independent digital communication channels;

said transmit part further comprising means (100, 1010, 1160,

     1500) for transmitting each byte of a high rate data flow through said set of n independent digital communication channels in accordance with the chronologic order assigned to each of said set of n independent digital communications channels (1500);

a receiving part comprising means for storing in said memory storage each byte of a splitted high-rate data flow received from each of said set of n independent digital communication channels at an address which is computed in accordance with the formula;

space="preserve" listing-type="equation">A(n)=A(n-1)+n

Where A(n-1) corresponds to the address in which a preceding byte conveyed through one of said set of n independent digital communication channels is stored, and n corresponds to the number of digital channels established.

9. Apparatus according to claim 8 characterized in that the DTE includes an ISDN primary terminal adapter and the multiple independent communications channels operating at n times 64 kbps, with n being an integer greater than 1.

10. In a digital communication network for transmitting digital data between a first Data Terminal Equipment DTE and a first remote DTE wherein the first DTE and the first remote DTE are separated by n separate independent digital communication channels, with n being an integer greater than 1 and each one of the n separate independent digital communication channels being operated at a first data rate, a device for forming a single high-rate digital channel operating at n x the first data rate comprising:

a first means, on request of the first DTE to the first remote DTE, for establishing a set of the n separate independent digital communication channels to be used in forming the single high-rate digital channel;

a second means for determining, during an initialization phase, the relationship between the slot of each one in the set of the n separate independent digital communication channels and the chronological order in which the slot was being established;

a third means for separating a high speed data flow into a plurality of predetermined data units;

and a fourth means for transmitting each one of the plurality of predetermined data units through said each one in the set of the n separate independent digital communication channels in accordance with the chronological order which was previously assigned to said each one in the set of the n-separate independent digital communication channels.

11. The device of claim 10 wherein each one of the plurality of predetermined units is equivalent to a data byte.

12. The device of claim 11 further including

a memory means for storing the high speed data flow to be transmitted through and to be received from the n separate independent digital communication channels;

and

a fifth means for receiving the data bytes from a selected group of the n separate independent digital communication channels and storing each byte at selected address in said memory means so that a high rate data flow received from the selected group of the n separate communication channels are being stored at contiguous memory locations.

13. The device of claim 12 wherein the memory address for each byte is computed from the expression:

space="preserve" listing-type="equation">A(n)=A(n-1)+n

Where A(n-1) represents the address in which a preceding byte, received from one of the selected group of the n separate independent digital communication channels, has been stored and n represents the number of separate independent digital communications channels established.