Nonvolatile memory card with an address table and an address translation logic for mapping out defective blocks within the memory card
First Claim
1. A nonvolatile memory card, comprising:
- (A) a first memory and a second memory, wherein the first memory includes a first block and a second block, each being addressed by a first block address and a second block address, respectively, wherein the second memory includes a third block and a fourth block, each being addressed by a third block address and a fourth block address, respectively;
(B) an address table stored in an electrically erasable and programmable read-only memory separate from the first and second memories for storing (1) each of the first, second, third, and fourth block addresses and (2) a first, a second, a third, and a fourth status data, each indicating an operational condition of one of the first, second, third, and fourth blocks, respectively, wherein each of the first, second, third, and fourth status data can be in a first state and a second state, wherein when a particular one of the first, second, third, and fourth blocks is non-operational, the corresponding one of the first, second, third, and fourth status data is at the first state;
(C) a set of program instructions for translating external addresses received from an external circuitry into memory addresses that access memory locations in only the operational ones of the first, second, third, and fourth blocks in accordance with the status data of the first, second, third, and fourth block stored in the address table such that the external addresses are consecutive while at least one of the first, second, third, and fourth blocks can be non-operational, wherein each of the external addresses includes a block address and an address associated with the block address.
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Abstract
A nonvolatile memory card includes first memory and a second memory. The first memory includes a first block and a second block, each can be addressed by a first block address and a second block address, respectively. The second memory includes a third block and a fourth block, each can be addressed by a third block address and a fourth block address, respectively. An address table is used for storing (1) each of the first, second, third, and fourth block addresses and (2) a first, a second, a third, and a fourth status data, each indicating the operational condition of one of the first, second, third, and fourth blocks, respectively. Each of the first, second, third, and fourth status data can be in a first state and a second state. When a particular one of the first, second, third, and fourth blocks is non-operational, the corresponding one of the first, second, third, and fourth status data is at the first state. An address translation logic is coupled to (1) the address table and (2) the first and second memories for receiving external addresses to access memory locations within the first and second memories, and for converting the external addresses to access the memory locations in only the operational ones of the first, second, third, and fourth blocks such that the external addresses are consecutive while at least one of the first, second, third, and fourth blocks can be non-operational. Each of the external addresses includes a block address and an address associated with the block address.
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Citations
13 Claims
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1. A nonvolatile memory card, comprising:
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(A) a first memory and a second memory, wherein the first memory includes a first block and a second block, each being addressed by a first block address and a second block address, respectively, wherein the second memory includes a third block and a fourth block, each being addressed by a third block address and a fourth block address, respectively; (B) an address table stored in an electrically erasable and programmable read-only memory separate from the first and second memories for storing (1) each of the first, second, third, and fourth block addresses and (2) a first, a second, a third, and a fourth status data, each indicating an operational condition of one of the first, second, third, and fourth blocks, respectively, wherein each of the first, second, third, and fourth status data can be in a first state and a second state, wherein when a particular one of the first, second, third, and fourth blocks is non-operational, the corresponding one of the first, second, third, and fourth status data is at the first state; (C) a set of program instructions for translating external addresses received from an external circuitry into memory addresses that access memory locations in only the operational ones of the first, second, third, and fourth blocks in accordance with the status data of the first, second, third, and fourth block stored in the address table such that the external addresses are consecutive while at least one of the first, second, third, and fourth blocks can be non-operational, wherein each of the external addresses includes a block address and an address associated with the block address. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A nonvolatile memory card, comprising:
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(A) a first memory and a second memory, wherein the first memory includes a first block and a second block, each being addressed by a first block address and a second block address, respectively, wherein the second memory includes a third block and a fourth block, each being addressed by a third block address and a fourth block address, respectively; (B) an address table stored in an electrically erasable and programmable read-only memory separate from the first and second memories for storing (1) each of the first, second, third, and fourth block addresses and (2) a first, a second, a third, and a fourth status data, each indicating an operational condition of one of the first, second, third, and the fourth blocks, respectively, wherein each of the first, second, third, fourth status data can be in a first state and a second state, wherein when a particular one of the first, second, third, and fourth blocks is non-operational, the corresponding one of the first, second, third, and fourth status data is at the first state; (C) a set of program instructions for translating external address received for external circuitry to memory addresses that access memory locations in only the operational ones of the first, second, third, and fourth blocks in accordance with the status data of the first, second, third, and fourth blocks stored in the address table such that the external addresses are consecutive while at least one of the first, second, third, and fourth blocks can be non-operational, wherein each of the external addresses includes a block address and an address associated with the block address; and (D) a capacity indication logic coupled to the address table for calculating a total number of operational blocks of the first, second, third, and fourth blocks and for indicating to the external circuitry the total number of operational blocks of the memory card. - View Dependent Claims (9, 10, 11, 12, 13)
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Specification