Transponder interface circuit

• US 5,525,994 A
• Filed: 06/07/1995
• Issued: 06/11/1996
• Est. Priority Date: 04/26/1994
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments Deutschland Gesellschaft Mit Beschrã¤Nkter Haftung (Texas Instruments, Inc.), Texas Instruments, Inc.
• Inventors: Hurta, Dwaine S., Froschermeier, Guenther
• Primary Examiner(s): Sotomayor, John B.
• Application Number:
  US08/483,608
• Time in Patent Office: 370 Days
• Field of Search: 342/42, 342/44, 342/50, 342/51
• US Class Current: 342/51
• CPC Class Codes: G01S 13/765 with exchange of information between interrogator and responder
• CPC Class Codes: G01S 13/767 Responders; Transponders teaching or practice apparatus for gun-aiming or gun-laying using reflecting targets or active targets F41G3/26

Abstract

A transponder interface circuit (172) operates to allow communication between a transponder controller (104) and external circuitry. The interface circuit (172) has a buffer memory (184,186) that allows the transponder controller (104) and the external circuitry each to transmit data at either the transponder'"'"'s (14) or the external circuitry'"'"'s clock rate without complicated protocols for direct communication. Each of the transponder controller (104) and the external circuit may be enabled by an interface controller (174) to assume control of the buffer memory (184,186). By using the buffer memory (184,186) and interface controller (174), whichever of the transponder controller (104) and the external circuitry is transmitting or receiving data may fill or empty the buffer memory (184,186) at either the transponder controller'"'"'s (104) or the external circuitry'"'"'s chosen clock rate. The interface controller (174) will monitor the transfer such that when the buffer memory (184,186) is full or empty, the interface controller (174) will send a command to the appropriate transponder controller (104) or external circuit to either receive data from the full buffer memory (184,186) or transmit data to the empty buffer memory (184,186).

Claims

1. A transponder operable to receive RF interrogations from an interrogator and to communicate with an external microcontroller via an external interface circuit, said transponder comprising:

a) a control circuit that upon reception of said RF interrogation is operable to perform further actions in response thereto; and

b) an interface controller that is interposed between said external interface and said control circuit, said interface controller alternatively operable to be activated by an "enable" signal from said control circuit and by an "extassert" signal from said external microcontroller.

2. The transponder of claim 1 and further comprising a transponder memory in electrical communication with said control circuit.

3. The transponder of claim 2 and further comprising a buffer memory interposed between said transponder memory and said external interface, said buffer memory having a clock input for clocking data into said buffer memory coincidentally with transitions of a data clocking signal received at said clock input.

4. The transponder of claim 3 and further comprising a clock selection multiplexer for generating said data clocking signal from one of at least two sources, the first source being a signal from the control circuit, and the second source being a clock signal received at said external interface.

5. The transponder of claim 3 and further comprising a data bus connecting said buffer memory to said transponder memory and an address bus connecting said interface controller to said transponder memory, said interface controller operable to send addresses to said transponder memory whereby data can be transferred between said buffer memory and said transponder memory to and from a selected transponder memory address.

6. The transponder of claim 3 and further comprising a data circulate circuit in electrical communication with and under control of said interface controller, said data circulate circuit operable to circulate data about said serial memory.

7. The transponder of claim 3 wherein data passes between said buffer memory and said external interface by a serial data stream.

8. The transponder of claim 7 and further comprising a bit-count circuit in electrical communication with said interface controller and said data clocking signal whereby said interface controller may monitor the position of the serial data stream as it is loaded into and out of said buffer memory.

9. The transponder of claim 1 wherein said interface controller further comprises circuitry for awakening said external microcontroller by asserting a "ucrdy" signal output.

10. A transponder operable to receive RF interrogations from an interrogator and to communicate with an external microcontroller via an external interface circuit, said transponder comprising:

a) a control circuit that upon reception of said RF interrogation is operable to perform further actions in response thereto;

b) a transponder memory in electrical communication with said control circuit;

c) a buffer memory interposed between said transponder memory and said external interface, said buffer memory having a clock input for clocking serial data in and out of said buffer memory coincidentally with transitions of a data clocking signal received at said clock input; and

d) an interface controller that is interposed between said external interface and said control circuit, said interface controller alternatively operable to be activated by an "enable" signal from said control circuit and by an "extassert" signal from said external microcontroller.

11. The transponder of claim 10 and further comprising a clock selection multiplexer for generating said data clocking signal from one of at least two sources, the first source being a signal from the control circuit, and the second source being a clock signal received at said external interface.

12. The transponder of claim 10 and further comprising a data bus connecting said buffer memory to said transponder memory and an address bus connecting said interface controller to said transponder memory, said interface controller operable to send addresses to said transponder memory whereby data can be transferred between said buffer memory and said transponder memory to and from a selected transponder memory address.

13. The transponder of claim 10 and further comprising a data circulate circuit in electrical communication with and under control of said interface controller, said data circulate circuit operable to circulate data about said serial memory.

14. A transponder operable to receive RF interrogations from an interrogator and to communicate with an external microcontroller via an external interface circuit, said transponder comprising:

a) a control circuit that upon reception of said RF interrogation is operable to perform further actions in response thereto;

b) a transponder memory in electrical communication with said control circuit;

c) a buffer memory interposed between said transponder memory and said external interface, said buffer memory having a clock input for clocking serial data in and out of said buffer memory coincidentally with transitions of a data clocking signal received at said clock input;

d) a clock selection multiplexer for generating said data clocking signal from one of at least two sources, the first source being a signal from the control circuit, and the second source being a clock signal received at said external interface;

d) an interface controller that is interposed between said external interface and said control circuit, said interface controller alternatively operable to be activated by an "enable" signal from said control circuit and by an "extassert" signal from said external microcontroller;

e) a data bus connecting said buffer memory to said transponder memory and further comprising an address bus connecting said interface controller to said transponder memory, said interface controller operable to send addresses to said transponder memory whereby data can be transferred between said buffer memory and said transponder memory to and from the desired transponder memory address; and

f) a data circulate circuit in electrical communication with and under control of said interface controller, said data circulate circuit operable to circulate data about said serial memory.