Semiconductor device for driving liquid crystal display panel

• US 5,526,014 A
• Filed: 03/09/1995
• Issued: 06/11/1996
• Est. Priority Date: 02/26/1992
• Status: Expired due to Fees

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Shiba, Hiroshi, Saitoh, Sei
• Primary Examiner(s): Hjerpe, Richard
• Assistant Examiner(s): Liang, Regina
• Application Number:
  US08/401,304
• Time in Patent Office: 460 Days
• Field of Search: 345/87, 345/94, 345/96, 345/98, 345/100, 345/204, 345/208, 345/209, 359/54, 359/55, 348/790
• US Class Current: 345/96
• CPC Class Codes: G09G 2330/023 using energy recovery or conservation
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general
• CPC Class Codes: G09G 3/3688 suitable for active matrices only

Abstract

An improvement of the LCD driving semiconductor IC which supplies a plurality of source driving voltages (corresponding to the horizontal scanning voltage of a CRT) to a plurality of source driving lines of an active matrix type LCD of TFT base is proposed. Each of sample/hold circuit that is provided in one-to-one correspondence to the source driving lines which carry out polarity inversion and extraction of voltage sample values of an image signal for every one line of horizontal scanning of applied voltages to liquid crystal cells for the purpose of preventing the deterioration of liquid crystal cells consisting of pixel display electrodes and counter electrodes of LCD and a liquid crystal material inserted between the electrodes, is composed of complementarily operating first circuit part and second circuit part, and the correspondence relation between polarity display pulse that controls the complementary operation of these circuit parts and the polarity of the voltage sample value, and these first/second circuit parts is fixed. By so doing, the variation range of the input voltage to each buffer amplifier of the first/second circuit parts was limited, the source-drain region formation process of the input transistor of its amplifier was simplified, and facilitated the improvement of the accuracy of the source driving voltage with respect to the input image signal.

Claims

1. In a semiconductor integrated circuit for driving a liquid crystal display (LCD) panel which includes a plurality of pixel formation electrodes arranged in matrix array forming a plurality of rows and columns on one surface of a transparent and plate like first base material, a plurality of counter electrodes arranged at respective positions corresponding respectively to said pixel formation electrodes on the surface opposite to said first base material of a second base material arranged in a surface parallel to said first base material with a minute gap between the first base material, a liquid crystal material filling said minute gap to form liquid crystal cells together with said pixel formation electrodes and the corresponding counter electrodes, a plurality of row wiring members formed respectively between said rows of said pixel formation electrodes in parallel to these rows, a plurality of column wiring members formed respectively between said columns of said pixel formation electrodes in parallel to and in noncontact state with these column wiring members, and a thin film transistor (TFT) which is arranged at each of the intersections of these row wiring members and the column wiring members with its gate electrode connected to said row wiring member and its source electrode connected to said column wiring member and its drain electrode connected to said pixel formation electrode, energized in response to a gate driving voltage from said row wiring member to supply a source driving voltage from said column wiring member to said pixel formation electrode and selectively controls the light transmission characteristic of said liquid crystal cell corresponding to the pixed formation electrode, thereby said source driving voltage is supplied to said column wiring member of the TFT-base LCD panel in which an image for one line portion of the horizontal scanning of the image signal to be displayed is displayed in said liquid crystal cells belonging to one line of said row wiring member,

the semiconductor integrated circuit device for LCD panel driving which includes within a semiconductor substrate,

means for repetitiously generating sampling pulses cyclically corresponding respectively to said column wiring members synchronized with the horizontal synchronizing pulse of said image signal and a clock pulse of a predetermined period,

means for inverting the polarity of the amplitude of said image signal with respect to a predetermined reference potential every time when said horizontal synchronizing pulse is generated,

means for generating a polarity display pulse having logical level corresponding to said polarity of the output of said polarity inversion means, and

a sample/hold circuit which samples the output of said polarity inversion means under control of said polarity display pulse and said sampling pulse and supplies the sample values to said column wiring members after holding them for the period of one line of said horizontal scanning,

the semiconductor integrated circuit device for LCD panel driving characterized in that said sample/hold circuit has a first circuit part which performs said sampling and said sample value holding in one of one-line period of said horizontal scanning and a second circuit part which performs said sampling and said sample value holding in one period of the next one line, and the correspondence relation of the first and the second circuit parts and said polarity of the output of said polarity inversion means is kept invariant,

wherein each of said first circuit parts of said sample/hold circuit includes an AND circuit for generating the AND output of said polarity display pulse and said sampling pulse, a first sampling switch which is energized in response to the output of this AND output for sampling the output voltage of said polarity inversion means, a first capacitor for holding the output voltage of this sampling switch, a first buffer amplifier for amplifying the terminal voltage of this capacitor, a first output switch for selectively supplying the output of amplifier to corresponding said column wiring member, said second circuit part includes an AND circuit for generating the AND output of said polarity display pulse and said sampling pulse, a second sampling switch for sampling the output voltage of said polarity inversion means in response to this AND output, a second capacitor for holding the output voltage of this sampling switch, a second buffer amplifier provided independently of said first buffer amplifier for amplifying the terminal voltage of this capacitor, and a second switch for selectively supplying the output of this amplifier to corresponding one of said column wiring members, and said sample/hold circuit further includes means for complementarily bringing said first sampling switch and said first output switch, and said second sampling switch and said second output switch to energized state by means of said polarity display pulse,

the voltage held by said first capacitor is always one of negative and positive polarities and the voltage held by said second capacitor is always the other of said negative and positive polarities, so that said first capacitor is free from holding the voltage of said other of said negative and positive polarities, and said second capacitor is free from holding the voltage of said one of said negative and positive polarities.

2. A semiconductor integrated circuit device for LCD panel driving as claimed in claim 1, wherein said polarity display pulse generating means inverts the output logical level for every period of the field or the frame of said image signal to maintain the correspondence relation with said polarity of the output of said polarity inversion means.

3. A semiconductor antegrated circuit device for LCD panel driving as claimed in claim 1, wherein said sample/hold circuits are provided in one-to-one correspondence to said column wiring members.

4. A semiconductor integrated circuit device for LCD panel driving as claimed in claim 1, wherein said polarity inversion means and said polarity display pulse generating means are formed in a semiconductor chap separate from that for other components and further includes means for connection to this separate semiconductor chip.

5. A semiconductor integrated circuit device for LCD panel driving as claimed in claim 1, wherein the process of forming the source and the drain regions within said semiconductor substrate for each transistor of said first and said second buffer amplifiers can be accomplished in one operation of impurity diffusion process.

6. A semiconductor integrated circuit device for driving a liquid crystal display device having a plurality of device lines each supplied with a drive voltage relative to an image signal to be displayed, said image signal having a sequence of fields, said semiconductor integrated circuit device comprising producing means responsive to said image signal for producing a first signal every odd-numbered field of said sequence of fields and a second signal every even-numbered field of said sequence of fields, said first signal always having a first polarity and said second signal always having a second polarity opposite to said first polarity, and a plurality of drive circuits each coupled to an associated one of said drive lines of said liquid crystal display device to supply said drive voltage thereto, each of said drive circuits including first circuit means coupled to said producing means for sampling and holding said first signal, second circuit means coupled to said producing means for sampling and holding said second signal, said first circuit means being free from sampling and holding said second signal and said second circuit means being free from sampling and holding said first signal, a first buffer amplifier coupled to said first circuit means to amplify the first signal sampled and held by said first circuit means, a second buffer amplifier coupled to said second circuit means and provided independently of said first buffer amplifier to amplify the second signal sampled and held by said second circuit means, and third circuit means coupled to said first and second buffer amplifiers for producing said drive voltage by alternately outputting output voltages of said first and second buffer amplifiers.

7. The device as claimed in claim 6, wherein each of said first and second circuit means includes a capacitor for holding an associated one of said first and second signals.

8. The device as claimed in claim 7, wherein said producing means produces said first and second signals alternately and said third circuit means outputs the output voltage of said first buffer amplifier when said producing means is producing said second signal and the output voltage of said second buffer amplifier when said producing means is producing said first signal.