Digital television system

• US 5,526,051 A
• Filed: 10/27/1993
• Issued: 06/11/1996
• Est. Priority Date: 10/27/1993
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Doherty, Donald B., Marshall, Stephen W., Gove, Robert J., Markandey, Vishal, Meyer, Richard C., Heimbuch, Scott D.
• Primary Examiner(s): Groody, James J.
• Assistant Examiner(s): Burgess, Glenton B.
• Application Number:
  US08/147,249
• Time in Patent Office: 958 Days
• Field of Search: 348/388, 348/721, 348/750, 348/720
• US Class Current: 375/240.01
• CPC Class Codes: H04N 19/30 using hierarchical techniques, e.g. scalability H04N19/63 takes precedence
• CPC Class Codes: H04N 19/423 characterised by memory arrangements H04N19/433 takes precedence
• CPC Class Codes: H04N 19/436 using parallelised computational arrangements
• CPC Class Codes: H04N 19/61 in combination with predictive coding
• CPC Class Codes: H04N 2005/7466 Control circuits therefor
• CPC Class Codes: H04N 21/426 Internal components of the client ; Characteristics thereof H04N5/44 takes precedence
• CPC Class Codes: H04N 21/4402 involving reformatting operations of video signals for household redistribution, storage or real-time display details of conversion of video standards at pixel level H04N7/01; video transcoding H04N19/40; adapting incoming signals to the display format of the display terminal G09G5/005; media handling at the source in data packet switching networks H04L65/764
• CPC Class Codes: H04N 3/08 having a moving reflector
• CPC Class Codes: H04N 5/14 Picture signal circuitry for video frequency region cameras or camera modules comprising electronic image sensors, or control thereof H04N23/00
• CPC Class Codes: H04N 5/144 Movement detection for video coding H04N19/503; analysis of motion in general G06T7/20
• CPC Class Codes: H04N 5/7458 the modulator being an array of deformable mirrors, e.g. digital micromirror device [DMD]
• CPC Class Codes: H04N 7/012 Conversion between an interlaced and a progressive signal for graphics images G09G2310/0229
• CPC Class Codes: H04N 7/0122 the input and the output signals having different aspect ratios
• CPC Class Codes: H04N 7/0135 involving interpolation processes interpolation-based image scaling G06T3/4007; interpolation for video coding H04N19/587, H04N19/59
• CPC Class Codes: H04N 9/3147 Multi-projection systems displays in general H04N9/12; video walls G06F3/1446, G09G2300/026
• CPC Class Codes: H04N 9/642 Multi-standard receivers
• CPC Class Codes: H04N 9/643 Hue control means, e.g. flesh tone control
• CPC Class Codes: H04N 9/67 for matrixing camera processing pipelines for matrixing of colour signals H04N23/85
• CPC Class Codes: H04N 9/68 for controlling the amplitude of colour signals, e.g. automatic chroma control circuits H04N9/71, H04N9/73 take precedence; camera processing pipelines for controlling the colour saturation of colour signals H04N23/86
• CPC Class Codes: H04N 9/69 for modifying the colour signals by gamma correction controlling camera response for colour signals H04N23/83

Abstract

A digital television system (10) is provided. System (10) may receive a video signal at composite video interface and separation circuit (16). The video signal is separated into separate video signals by composite video interface and separation circuit (16). The separate video signals are converted to digital video signals in analog to digital converter circuit (18). Line slicer (14) divides each line of digital video signal into a plurality of channels such that each channel may be processed in parallel by channel signal processors (22a) through (22d). Each channel signal processor (22a) through (22d) may provide two lines of output for each line of video input. The processed digital video signals may be formatted for displays (26a) through (26c) in formatters (24a) through (24c).

Claims

1. A digital television system, comprising:

circuitry operable to divide a line of input video signals into a plurality of channels for each input video signal;

circuitry responsive to said dividing circuitry and operable to simultaneously process said channels of input video signals; and

at least one spatial light modulator responsive to said processing circuitry and operable to display said processed input video signals, wherein said modulator displays said processed input video signals by controlling individual elements of an array on said modulator.

2. The system of claim 1, wherein said dividing circuitry comprises a line slicer operable to divide a line of input video signals into four channels for each input video signal.

3. The system of claim 1, wherein said dividing circuitry comprises a line slicer operable to divide a line of input video signals into five channels for each input video signal.

4. The system of claim 1, wherein, for each channel created by said dividing circuitry, said processing circuitry comprises a video signal processor operable to convert each line of input video signal into two lines of input video signal, to control sharpness, hue, saturation, contrast, and brightness of said video input signals, to convert said input video signals from one color space to another color space, and to remove a gamma curve from said input video signals.

5. The system of claim 1, wherein, for each channel created by said dividing circuitry, said processing circuitry comprises:

a matrix multiplication circuit responsive to said processing circuitry and operable to convert said input video signals from one color space to another color space, and operable to control hue and saturation of said input video signals;

a look up table responsive to said matrix multiplication circuit and operable to remove a gamma curve from said input video signals, and operable to control contrast and brightness of said input video signals; and

at least one scan line video processor responsive to said first look up table and operable to convert each line of input video signal into two lines of input video signal, and operable to control sharpness of said input video signals.

6. The system of claim 1, wherein, for each channel created by said dividing circuitry, said processing circuitry comprises:

at least one scan line video processor responsive to said dividing circuitry and operable to convert each line of input video signal into two lines of input video signal, and operable to control sharpness of said input video signals;

a matrix multiplication circuit responsive to said scan line video processors and operable to convert said input video signals from one color space to another color space, and operable to control hue and saturation of said input video signals; and

a look up table responsive to said matrix multiplication circuit and operable to remove a gamma curve from said input video signals, and operable to control contrast and brightness of said input video signals.

7. The system of claim 1, wherein, for each channel created by said dividing circuitry, said processing circuitry comprises:

a matrix multiplication circuit responsive to said dividing circuitry and operable to convert said input video signals from one color space to another color space, and operable to control hue and saturation of said input video signals;

at least one scan line video processor responsive to said matrix multiplication circuit and operable to convert each line of input video signal into two lines of input video signal, and operable to control sharpness of said input video signals; and

a look up table responsive to said scan line video processor and operable to remove a gamma curve from said input video signals, and operable to control contrast and brightness of said input video signals.

8. The system of claim 1, wherein, for each channel created by said dividing circuitry, said processing circuitry comprises:

a look up table responsive to said dividing circuitry and operable to remove a gamma curve from said input video signals, and operable to control contrast and brightness of said input video signals;

at least one scan line video processor responsive to said look up table and operable to convert each line of input video signal into two lines of input video signal, and operable to control sharpness of said input video signals; and

a matrix multiplication circuit responsive to said scan line video processors and operable to convert said input video signals from one color space to another color space, and operable to control hue and saturation of said input video signals.

9. The system of claim 1, wherein, for each channel created by said dividing circuitry, said processing circuitry comprises:

a first matrix multiplication circuit responsive to said dividing circuitry and operable to convert said input video signals from one color space to another color space, and operable to control hue and saturation of said input video signals;

a first look up table responsive to said first matrix multiplication circuit and operable to remove a gamma curve from said input video signals, and operable to control contrast and brightness of said input video signals;

at least one scan line video processor responsive to said first look up table and operable to convert each line of input video signal into two lines of input video signal, and operable to control sharpness of said input video signals;

a second matrix multiplication circuit responsive to said scan line video processors and operable to convert said input video signals from one color space to another color space, and operable to control hue and saturation of said input video signals; and

a second look up table responsive to said second matrix multiplication circuit and operable to remove a gamma curve from said input video signals, and operable to control contrast and brightness of said input video signals.

10. The system of claim 1, wherein said modulator comprises one spatial light modulator array for each input video signal.

11. The system of claim 1, wherein an array of said modulator comprises one digital micromirror device for each input video signal.

12. The system of claim 1, and further comprising circuitry coupled to said dividing circuitry and operable to receive a composite video signal from a standard video source and to convert said composite video signal to a plurality of digital input video signals.

13. The system of claim 1, and further comprising circuitry responsive to said processing circuitry and coupled to said displaying circuitry and operable to format said processed input video signals for said display.

14. A high definition digital television system, comprising:

circuitry operable to receive a video signal and to provide a plurality of digital video signals;

circuitry responsive to said receiving circuitry and operable to divide a line of said digital video signals into a plurality of channels for each digital video signal;

circuitry responsive to said dividing circuitry and operable to simultaneously process said channels of digital video signals; and

a spatial light modulator responsive to said processing circuitry and operable to display said processed digital video signals by controlling individual elements of an array of said modulator.

15. The system of claim 14, and further comprising circuitry responsive to said processing circuitry and operable to format said processed digital video signals for said displaying circuitry.

16. The system of claim 14, wherein said dividing circuitry comprises a line slicer operable to divide a line of digital video signals into four channels for each digital video signal.

17. The system of claim 14, wherein said dividing circuitry comprises a line slicer operable to divide a line of digital video signals into five channels for each digital video signal.

18. The system of claim 14, wherein, for each channel created by said dividing circuitry, said processing circuitry comprises a video signal processor operable to convert each line of input video signal into two lines of input video signal, to control sharpness, hue, saturation, contrast, and brightness of said video signals, to convert said input video signals from one color space to another color space, and to remove a gamma curve from said input video signals.

19. The system of claim 14, wherein, for each channel created by said dividing circuitry, said processing circuitry comprises:

a matrix multiplication circuit responsive to said processing circuitry and operable to convert said digital video signals from one color space to another color space, and operable to control hue and saturation of said digital video signals;

a look up table responsive to said matrix multiplication circuit and operable to remove a gamma curve from said digital video signals, and operable to control contrast and brightness of said digital video signals; and

at least one scan line video processor responsive to said first look up table and operable to convert each line of digital video signal into two lines of digital video signal, and operable to control sharpness of said digital video signals.

20. The system of claim 14, wherein, for each channel created by said dividing circuitry, said processing circuitry comprises:

at least one scan line video processor responsive to said dividing circuitry and operable to convert each line of digital video signal into two lines of digital video signal, and operable to control sharpness of said digital video signals;

a matrix multiplication circuit responsive to said scan line video processors and operable to convert said digital video signals from one color space to another color space, and operable to control hue and saturation of said digital video signals; and

a look up table responsive to said matrix multiplication circuit and operable to remove a gamma curve from said digital video signals, and operable to control contrast and brightness of said digital video signals.

21. The system of claim 14, wherein, for each channel created by said dividing circuitry, said processing circuitry comprises:

a matrix multiplication circuit responsive to said dividing circuitry and operable to convert said digital video signals from one color space to another color space, and operable to control hue and saturation of said digital video signals;

at least one scan line video processor responsive to said matrix multiplication circuit and operable to convert each line of digital video signal into two lines of digital video signal, and operable to control sharpness of said digital video signals; and

a look up table responsive to said scan line video processor and operable to remove a gamma curve from said digital video signals, and operable to control contrast and brightness of said digital video signals.

22. The system of claim 14, wherein, for each channel created by said dividing circuitry, said processing circuitry comprises:

a look up table responsive to said dividing circuitry and operable to remove a gamma curve from said digital video signals, and operable to control contrast and brightness of said digital video signals;

at least one scan line video processor responsive to said look up table and operable to convert each line of digital video signal into two lines of digital video signal, and operable to control sharpness of said digital video signals; and

a matrix multiplication circuit responsive to said scan line video processors and operable to convert said digital video signals from one color space to another color space, and operable to control hue and saturation of said digital video signals.

23. The system of claim 14, wherein, for each channel created by said dividing circuitry, said processing circuitry comprises:

a first matrix multiplication circuit responsive to said dividing circuitry and operable to convert said digital video signals from one color space to another color space, and operable to control hue and saturation of said digital video signals;

a first look up table responsive to said first matrix multiplication circuit and operable to remove a gamma curve from said digital video signals, and operable to control contrast and brightness of said digital video signals;

at least one scan line video processor responsive to said first look up table and operable to convert each line of digital video signal into two lines of digital video signal, and operable to control sharpness of said digital video signals;

a second matrix multiplication circuit responsive to said scan line video processors and operable to convert said digital video signals from one color space to another color space, and operable to control hue and saturation of said digital video signals; and

a second look up table responsive to said second matrix multiplication circuit and operable to remove a gamma curve from said digital video signals, and operable to control contrast and brightness of said digital video signals.

24. The system of claim 14, wherein said displaying circuitry comprises one spatial light modulator for each digital video signal.

25. The system of claim 14, wherein said spatial light modulator comprises one digital micromirror device for each digital video signal.

26. A method for creating a high definition video display from a standard video signal, comprising the steps of:

separating a standard composite video signal into a plurality of video signals;

sampling the separated video signals to create digital video signals;

dividing said digital video signals into a plurality of channels;

processing the plurality of channels of digital video signals in parallel; and

displaying the processed digital video signals as a high definition display, by using processed data from said plurality of channels to control individual elements of a spatial light modulator array.

27. The method of claim 26, and further comprising the step of formating the process digital video signals for a display.

28. The method of claim 26, wherein said step of sampling the separated video signals to create digital video signals comprises the step of sampling the separated video signals to create digital video signals in an analog to digital converter.

29. The method of claim 26, wherein said step of dividing said digital video signals into a plurality of channels comprises the step of dividing said digital video signals into four channels.

30. The method of claim 26, wherein said step of dividing said digital video signals into a plurality of channels comprises the step of dividing said digital video signals into five channels.

31. The method of claim 26, wherein said step of processing the plurality of channels of digital video signals in parallel comprises the step of processing the plurality of channels in a scan line video processor.

32. The method of claim 26, wherein said step of displaying the formatted digital video signals comprises the step of displaying the formatted digital video signals on a spatial light modulator display.