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Burst EDO memory device

  • US 5,526,320 A
  • Filed: 12/23/1994
  • Issued: 06/11/1996
  • Est. Priority Date: 12/23/1994
  • Status: Expired due to Term
First Claim
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1. A memory device having a plurality of memory elements, each of the elements having an associated address, the memory device further comprising:

  • addressing circuitry adapted to receive at least a first portion of an address from a source external to the memory device in response to a transition of an address strobe signal, and further adapted to advance the address in a predetermined address sequence in response to a subsequent transition of the address strobe signal; and

    output buffer circuitry adapted to drive data from the memory device only after a plurality of transitions of the address strobe signal in a burst read access.

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