Voltage clamp circuit and method

• US 5,532,635 A
• Filed: 09/12/1994
• Issued: 07/02/1996
• Est. Priority Date: 09/12/1994
• Status: Expired due to Fees

• Current Assignee: Silicon Power Corporation
• Original Assignee: Harris Corporation (L3Harris Technologies, Inc.)
• Inventors: Watrous, Donald L., Temple, Victor A. K.
• Primary Examiner(s): Nelms, David C.
• Assistant Examiner(s): PHAN, TRONG Q
• Application Number:
  US08/304,554
• Time in Patent Office: 659 Days
• Field of Search: 327/310, 327/379, 327/387, 327/389, 327/108, 327/110, 327/384, 327/493, 327/434, 361/111, 361/118, 361/120, 361/56, 361/104, 400/121
• US Class Current: 327/310
• CPC Class Codes: H02H 9/042 comprising means to limit the absorbed power or indicate damaged over-voltage protection device
• CPC Class Codes: H03K 17/08148 in composite switches

Abstract

An active clamp circuit for controlling over-voltage, surge conditions in electrical circuits. The active clamp includes a varistor which is switched into a circuit by a high power switch upon the detection of a surge condition. The use of a MOS Controlled Thyristor ("MCT") as a means for the switching the varistor permits the circuit to withstand a high di/dt and surge current while maintaining both on and off gated control of the switch.

Claims

1. In an electrical circuit in which a power source supplies electrical power to a load, a circuit for reducing the transmission of surge voltage to the load comprising:

a switch electrically connected in series with a varistor, said series being electrically connected across said load; and

a switch drive circuit controlling said switch so that said switch is off when no surge is present and said switch is on when surge is present to thereby permit said varistor to absorb the energy of the surge during the surge.

2. The circuit of claim 1 wherein said switch drive circuit comprises:

surge sensing means for sensing the surge in said circuit;

turn-on signal generating means for generating a switch turn-on signal when said surge sensed by said surge sensing means exceeds a specified clamp voltage thereby activating said switch; and

switch deactivating means for deactivating said switch when the surge dissipates.

3. The circuit of claim 2 wherein said switch comprises an MOS Controlled Thyristor.

4. An electrical switch circuit having reduced voltage transients across said electrical switch during turn-off, comprising:

a first MCT electrically connected to operate as a power switch;

a varistor and a second MCT connected in series, the series being electrically connected across said first MCT;

a resistor and diode electrically connected in parallel to one another and interconnecting the gate terminals of said first and second MCTs.

5. The electrical switch of claim 4 wherein said second MCT continues to conduct for a period of time after the turn off of the first MCT to suppress voltage transients across said switch.

6. The electrical switch of claim 5 wherein the period of time during which the second MCT conducts after the turn off of the first MCT is related to the size of said resistor and the capacitance of the gate terminal.

7. A circuit to suppress voltage transients across a load, said circuit comprising:

an SCR connected in series between a first diode and a first resistor, said series being connected across said load;

an MCT interconnected in series between first and second varistors, said series being connected across said load, the gate terminal of said MCT being electrically connected to the output terminal of said SCR;

a second resistor and a capacitor being connected in series between a terminal of said load and said second varistor;

a second zener diode connected across said capacitor;

wherein a voltage transient across the load causes the SCR to turn on which causes the MCT to turn on, absorbing the voltage transient across said first and second varistors.

8. The circuit to suppress of claim 7 wherein the voltage transient charges said capacitor thereby keeping said MCT turned on for a longer period of time than the voltage surge.

9. The circuit to suppress of claim 7 wherein during the surge the current through said first resistor is less than the holding current of said SCR.

10. The circuit to suppress of claim 7 wherein during a surge the current through said second resistor is at least several times greater than the current through said first resistor.

11. The circuit to suppress of claim 7 wherein said SCR is turned on when the transient voltage exceeds the breakdown voltage of said first diode.

12. A switched varistor voltage clamp for clamping voltage surges in a circuit comprising:

a high power switch responsive to a specified turn-on signal and a specified turn-off signal;

a varistor circuit in series with said high power switch, said varistor circuit having at least one varistor; and

,

switch control means for selectively producing said turn-on signal and said turn-off signal to thereby selectively activate said high power switch when there is a voltage surge so that voltage surges occurring in the circuit are dissipated by said varistor circuit and deactivate said high power switch when the voltage surge is no longer present.

17. The voltage clamp of claim 12 wherein said varistor circuit comprises two varistors in series with each other.

13. A switched varistor voltage clamp for clamping voltage surges in a circuit comprising:

a high power switch responsive to a specified turn-on signal and a specified turn-off signal;

a varistor circuit is series with said switch; and

switch control means for providing said turn-on and turn-off signals to operate said switch whereby surges occurring in the circuit are dissipated by said varistor circuit, said switch control means comprising,

voltage surge sensing means for sensing a voltage surge in said circuit;

turn-on signal generating means for generating said turn-on signal when said voltage surge sensed by said voltage sensing means exceeds a specified clamp voltage thereby activating said high power switch; and

switch deactivating means for deactivating said high power switch when said voltage surge dissipates.

14. The voltage clamp of claim 13 wherein said switch deactivating means comprises:

current monitoring means for monitoring a switch current through said high power switch; and

turn-off signal generating means for generating a turn-off signal when said switch current falls below a specified minimum current thereby deactivating said high power switch.

15. The voltage clamp of claim 13 wherein said high power switch is an MCT switch.

16. The voltage clamp of claim 13 wherein said specified clamp voltage is less than twice the steady state voltage rating of said varistor circuit.

18. The voltage clamp of claim 13 used as a circuit breaker wherein said voltage surges are random and unpredictable.

19. The voltage clamp of claim 13 wherein said voltage surges are repetitive and predictable.

20. The voltage clamp of claim 19 wherein said voltage surges are produced by an inverter circuit.

21. A method of clamping voltage surges in a circuit comprising the steps of:

(a) providing a high power signal with random voltage surges;

(b) detecting said voltage surges;

(c) generating a turn-on signal when said voltage surges exceed a specified clamp voltage;

(d) activating a high power switch in response to the turn-on signal when said voltage surges are detected thereby passing the current of said high power signal through a varistor circuit in series with said high power switch whereby said varistor absorbs unwanted energy; and

(e) deactivating said high power switch when said voltage surge dissipates.

22. The method of claim 21 wherein said high power switch is an MCT switch.

23. The method of claim 21 wherein said deactivating step further comprises:

(a) monitoring the current passing through said high power switch when activated; and

(b) generating a turn-off signal when said current drops below a specified maximum current; and

(c) deactivating said high power switch in response to said turn-off signal.

24. In a switched varistor circuit for clamping voltage surges, the improvement comprising a high power MCT switch in series with a varistor to thereby create a switched varistor circuit where the clamp voltage of said switched varistor circuit is less than twice the steady state voltage rating of said switched varistor circuit, said switch being activated when a voltage surge exceeds said clamp voltage and deactivated when said voltage surge dissipates.