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Low frequency common mode rejection in a clock circuit

  • US 5,533,053 A
  • Filed: 05/16/1994
  • Issued: 07/02/1996
  • Est. Priority Date: 05/16/1994
  • Status: Expired due to Term
First Claim
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1. Apparatus comprising:

  • a driver for providing a signal;

    a capacitor having a first terminal and a second terminal, said first terminal coupled to said driver, said capacitor for coupling said signal from said first terminal to said second terminal;

    an impedance element comprising a transconductance element coupled to said second terminal for filtering said signal, wherein said impedance element has a highpass filter characteristic and wherein said impedance element further comprises a feedback capacitor in a feedback loop around said transconductance element;

    a comparator coupled to said impedance element for comparing said signal; and

    a reference voltage source coupled to said impedance element and to said comparator, wherein said transconductance element comprises;

    an amplifier having a first amplifier input, a second amplifier input, and an amplifier output;

    a field effect transistor (FET) having a gate terminal, a first FET terminal, and a second FET terminal, said amplifier output coupled to said gate terminal, said first amplifier input coupled to said first FET terminal, said second FET terminal coupled to a first feedback capacitor terminal of said feedback capacitor, and said second amplifier input coupled to a second feedback capacitor terminal of said feedback capacitor.

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