Signal delay method, signal delay device and circuit for use in the apparatus

• US 5,534,808 A
• Filed: 01/25/1993
• Issued: 07/09/1996
• Est. Priority Date: 01/31/1992
• Status: Expired due to Term

• Current Assignee: Konica Corporation (Konica Minolta Inc.)
• Original Assignee: Konica Corporation (Konica Minolta Inc.)
• Inventors: Ishii, Hiroshi, Takaki, Kouichi, Azumai, Mitsuo
• Primary Examiner(s): Callahan, Timothy P.
• Assistant Examiner(s): LAM, TUAN THIEU
• Application Number:
  US08/008,715
• Time in Patent Office: 1,261 Days
• Field of Search: 328/55, 328/63, 328/255, 307/269, 307/262, 307/602, 307/603, 327/141, 327/153, 327/154, 327/158-163, 327/231, 327/237, 327/238, 327/240-242, 327/250-253, 327/261-263, 327/269, 327/270, 327/276
• US Class Current: 327/261
• CPC Class Codes: H03K 2005/00234 using circuits having two logic levels
• CPC Class Codes: H03K 5/131 Digitally controlled
• CPC Class Codes: H03K 5/135 by the use of time reference signals, e.g. clock signals

Abstract

In a circuit provided in a single integrated circuit unit for use in a signal delay device, there is provided with a device in which an input signal is delayed and a plurality of delay signals, each having a different delay period from the input signal, are outputted, and a detector in which a delay signal having a specific relation with the input signal among the plurality of delay signals is detected.

Claims

1. A device for providing a desired delayed signal, comprising:

(a) means for delaying an input signal to produce a plurality of delayed signals, each delayed signal having a different delay time with respect to said input signal;

(b) a plurality of phase detecting means for detecting a plurality of specific delayed signals having specific relations with said input signal from said plurality of delayed signals;

(c) masking means for making only one of said plurality of phase detecting means operative; and

(d) means for determining a desired delayed signal from said plurality of delayed signals according to the detected result by said plurality of detecting means to output said desired delayed signal.

2. The device of claim 1, wherein said one of said phase detecting means detects the specific delayed signal having a shortest delay time.

3. The device of claim 2, wherein said plurality of phase detecting means are divided into a plurality of groups, one of said plurality of specific delayed signals is detected in each of said groups, and said masking means output signals for inhibiting said specific delayed signal from being detected in other groups when said specific delayed signal is detected in one of said groups.