Encoding and decoding video signals using dynamically generated quantization matrices

• US 5,535,138 A
• Filed: 09/08/1994
• Issued: 07/09/1996
• Est. Priority Date: 11/24/1993
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Keith, Michael
• Primary Examiner(s): Ramirez, Ellis B.
• Application Number:
  US08/303,313
• Time in Patent Office: 670 Days
• Field of Search: 364/514 R, 364/514 A, 364/715.02, 348/390, 348/396, 348/395, 348/394, 348/404, 348/409, 348/412, 348/12, 348/13, 348/19, 348/607, 348/391, 395/162
• US Class Current: 709/204
• CPC Class Codes: H04N 19/107 between spatial and temporal predictive coding, e.g. picture refresh
• CPC Class Codes: H04N 19/124 Quantisation
• CPC Class Codes: H04N 19/126 Details of normalisation or weighting functions, e.g. normalisation matrices or variable uniform quantisers
• CPC Class Codes: H04N 19/13 Adaptive entropy coding, e.g. adaptive variable length coding [AVLC] or context adaptive binary arithmetic coding [CABAC]
• CPC Class Codes: H04N 19/132 Sampling, masking or truncation of coding units, e.g. adaptive resampling, frame skipping, frame interpolation or high-frequency transform coefficient masking
• CPC Class Codes: H04N 19/14 Coding unit complexity, e.g. amount of activity or edge presence estimation H04N19/146 takes precedence
• CPC Class Codes: H04N 19/146 Data rate or code amount at the encoder output
• CPC Class Codes: H04N 19/149 by estimating the code amount by means of a model, e.g. mathematical model or statistical model
• CPC Class Codes: H04N 19/174 the region being a slice, e.g. a line of blocks or a group of blocks
• CPC Class Codes: H04N 19/176 the region being a block, e.g. a macroblock
• CPC Class Codes: H04N 19/196 being specially adapted for the computation of encoding parameters, e.g. by averaging previously computed encoding parameters processing of motion vectors H04N19/513
• CPC Class Codes: H04N 19/197 including determination of the initial value of an encoding parameter H04N19/56 takes precedence
• CPC Class Codes: H04N 19/198 including smoothing of a sequence of encoding parameters, e.g. by averaging, by choice of the maximum, minimum or median value
• CPC Class Codes: H04N 19/527 Global motion vector estimation
• CPC Class Codes: H04N 19/587 involving temporal sub-sampling or interpolation, e.g. decimation or subsequent interpolation of pictures in a video sequence
• CPC Class Codes: H04N 19/60 using transform coding
• CPC Class Codes: H04N 19/61 in combination with predictive coding
• CPC Class Codes: H04N 19/80 Details of filtering operations specially adapted for video compression, e.g. for pixel interpolation H04N19/635, H04N19/86 take precedence
• CPC Class Codes: H04N 19/82 involving filtering within a prediction loop
• CPC Class Codes: H04N 19/86 involving reduction of coding artifacts, e.g. of blockiness
• CPC Class Codes: H04N 19/895 : in combination with error concealment
• CPC Class Codes: H04N 19/91 : Entropy coding, e.g. variable length coding [VLC] or arithmetic coding
• CPC Class Codes: H04N 7/15 : Conference systems
• CPC Class Codes: H04N 7/152 : Multipoint control units therefor
• CPC Class Codes: H04N 7/52 : Systems for transmission of a pulse code modulated video signal with one or more other pulse code modulated signals, e.g. an audio signal or a synchronizing signal assembling of a multiplex stream by combining a video stream with other content or additional data, remultiplexing of multiplex streams, insertion of stuffing bits into the multiplex stream, assembling of a packetised elementary stream at server side H04N21/236; disassembling of a multiplex stream, remultiplexing of multiplex streams, extraction or processing of Service Information, disassembling of packetised elementary stream at client side H04N21/434
• CPC Class Codes: H04Q 11/0435 : Details
• CPC Class Codes: H04Q 2213/13034 : A/D conversion, code compression/expansion
• CPC Class Codes: H04Q 2213/13103 : Memory
• CPC Class Codes: H04Q 2213/13106 : Microprocessor, CPU
• CPC Class Codes: H04Q 2213/13152 : Callback
• CPC Class Codes: H04Q 2213/1319 : Amplifier, attenuation circuit, echo suppressor
• CPC Class Codes: H04Q 2213/13209 : ISDN
• CPC Class Codes: H04Q 2213/1324 : Conference call
• CPC Class Codes: H04Q 2213/13299 : Bus
• CPC Class Codes: H04Q 2213/13337 : Picturephone, videotelephony

Abstract

Video signals are encoded using quantization matrices generated based on one or more quantization matrix parameters that are contained in the encoded bit stream. Encoded video signals are decoded using quantization matrices generated using the one or more quantization matrix parameters that are contained in the encoded bit stream.

Claims

1. A computer-implemented process for encoding video signals, comprising the steps of:

(a) generating a plurality of quantization matrices using one or more quantization matrix parameters;

(b) encoding video signals using the quantization matrices to generate encoded video signals; and

(c) generating an encoded bit stream comprising the encoded video signals and the quantization matrix parameters.

2. The process of claim 1, wherein step (a) comprises the step of generating the quantization matrices using at least one base matrix.

3. The process of claim 2, wherein the encoded bit stream comprises a flag indicating whether the base matrix is a default base matrix.

4. The process of claim 2, wherein:

step (a) comprises the step of generating the quantization matrices using the base matrix and a tilt parameter; and

the encoded bit stream comprises the tilt parameter.

5. The process of claim 2, wherein:

step (a) comprises the step of generating the quantization matrices using the base matrix, a quantization start parameter, and a quantization step parameter; and

the encoded bit stream comprises the quantization start parameter and the quantization step parameter.

6. The process of claim 5, wherein:

step (a) comprises the step of generating a plurality of intraframe quantization matrices using the base matrix, the quantization start parameter, the quantization step parameter, and a DC coefficient step parameter; and

the encoded bit stream further comprises the DC coefficient step parameter.

7. The process of claim 2, wherein:

step (b) comprises the step of quantizing the video signals using bit shifts; and

the encoded bit stream comprises a flag indicating whether dequantization may be implemented using bit shifts.

8. The process of claim 1, wherein:

step (a) comprises the steps of;

(1) generating a plurality of intraframe quantization matrices using an intraframe base matrix, an intraframe tilt parameter, a quantization start parameter, a quantization step parameter, and a DC step parameter; and

(2) generating a plurality of interframe quantization matrices using an interframe base matrix, an interframe tilt parameter, the quantization start parameter, and the quantization step parameter;

step (b) comprises the step of encoding the video signals using the intraframe quantization matrices and the interframe quantization matrices; and

the encoded bit stream comprises;

a flag indicating whether the base matrix is a default base matrix;

the quantization start parameter;

the quantization step parameter;

the DC coefficient step parameter;

the interframe tilt parameter;

the intraframe tilt parameter; and

a flag indicating whether dequantization may be implemented using bit shifts.

9. The process of claim 8, wherein the encoded bit stream comprises:

a 6-bit QuantStart parameter;

a 6-bit QuantStep parameter;

a 6-bit DCstep parameter;

a 6-bit Tilt[0] parameter;

a 6-bit Tilt[1] parameter; and

a 1-bit PowersOf2 parameter.

10. The process of claim 9, wherein the encoded bit stream further comprises:

a 384-bit interframe base matrix; and

a 384-bit intraframe base matrix.

40. The apparatus of claim 1, wherein:

the encoded bit stream comprises;

a flag indicating whether the base matrix is a default base matrix;

the quantization start parameter;

the quantization step parameter;

the DC coefficient step parameter;

the interframe tilt parameter;

the intraframe tilt parameter; and

a flag indicating whether dequantization may be implemented using bit shifts;

means (b) comprises;

(1) means for generating a plurality of intraframe quantization matrices using an intraframe base matrix, the intraframe tilt parameter, the quantization start parameter, the quantization step parameter, and the DC step parameter; and

(2) means for generating a plurality of interframe quantization matrices using an interframe base matrix, the interframe tilt parameter, the quantization start parameter, and the quantization step parameter; and

means (c) comprises means for decoding the encoded video signals using the intraframe quantization matrices and the interframe quantization matrices.

41. The apparatus of claim 40, wherein the encoded bit stream comprises:

a 6-bit QuantStart parameter;

a 6-bit QuantStep parameter;

a 6-bit DCstep parameter;

a 6-bit Tilt[0] parameter;

a 6-bit Tilt[1] parameter; and

a 1-bit PowersOf2 parameter.

42. The apparatus of claim 41, wherein the encoded bit stream further comprises:

a 384-bit interframe base matrix; and

a 384-bit intraframe base matrix.

43. The apparatus of claim 40, wherein the apparatus is connected to a bus and the bus is further connected to a memory device.

11. An apparatus for encoding video signals, comprising:

(a) means for generating a plurality of quantization matrices using one or more quantization matrix parameters;

(b) means for encoding video signals using the quantization matrices to generate encoded video signals; and

(c) means for generating an encoded bit stream comprising the encoded video signals and the quantization matrix parameters.

12. The apparatus of claim 11, wherein means (a) comprises means for generating the quantization matrices using at least one base matrix.

13. The apparatus of claim 12, wherein the encoded bit stream comprises a flag indicating whether the base matrix is a default base matrix.

14. The apparatus of claim 12, wherein:

means (a) comprises means for generating the quantization matrices using the base matrix and a tilt parameter; and

the encoded bit stream comprises the tilt parameter.

15. The apparatus of claim 12, wherein:

means (a) comprises means for generating the quantization matrices using the base matrix, a quantization start parameter, and a quantization step parameter; and

the encoded bit stream comprises the quantization start parameter and the quantization step parameter.

16. The apparatus of claim 15, wherein:

means (a) comprises means for generating a plurality of intraframe quantization matrices using the base matrix, the quantization start parameter, the quantization step parameter, and a DC coefficient step parameter; and

the encoded bit stream further comprises the DC coefficient step parameter.

17. The apparatus of claim 12, wherein:

means (b) comprises means for quantizing the video signals using bit shifts; and

the encoded bit stream comprises a flag indicating whether dequantization may be implemented using bit shifts.

18. The apparatus of claim 11, wherein:

means (a) comprises;

(1) means for generating a plurality of intraframe quantization matrices using an intraframe base matrix, an intraframe tilt parameter, a quantization start parameter, a quantization step parameter, and a DC step parameter; and

(2) means for generating a plurality of interframe quantization matrices using an interframe base matrix, an interframe tilt parameter, the quantization start parameter, and the quantization step parameter;

means (b) comprises means for encoding the video signals using the intraframe quantization matrices and the interframe quantization matrices; and

the encoded bit stream comprises;

a flag indicating whether the base matrix is a default base matrix;

the quantization start parameter;

the quantization step parameter;

the DC coefficient step parameter;

the interframe tilt parameter;

the intraframe tilt parameter; and

a flag indicating whether dequantization may be implemented using bit shifts.

19. The apparatus of claim 18, wherein the encoded bit stream comprises:

a 6-bit QuantStart parameter;

a 6-bit QuantStep parameter;

a 6-bit DCstep parameter;

a 6-bit Tilt[0] parameter;

a 6-bit Tilt[1] parameter; and

a 1-bit PowersOf2 parameter.

20. The apparatus of claim 19, wherein the encoded bit stream further comprises:

a 384-bit interframe base matrix; and

a 384-bit intraframe base matrix.

21. The apparatus of claim 18, wherein the apparatus is connected to a bus and the bus is further connected to a memory device.

22. The apparatus of claim 11, wherein the apparatus is connected to a bus and the bus is further connected to a memory device.

23. A computer-implemented process for decoding video signals, comprising the steps of:

(a) providing an encoded bit stream comprising encoded video signals and one or more quantization matrix parameters;

(b) generating a plurality of quantization matrices using the quantization matrix parameters; and

(c) decoding the encoded video signals using the quantization matrices to generate decoded video signals.

24. The process of claim 23, wherein step (b) comprises the step of generating the quantization matrices using at least one base matrix.

25. The process of claim 24, wherein the encoded bit stream comprises a flag indicating whether the base matrix is a default base matrix.

26. The process of claim 24, wherein:

the encoded bit stream comprises a tilt parameter; and

step (b) comprises the step of generating the quantization matrices using the base matrix and the tilt parameter.

27. The process of claim 24, wherein:

the encoded bit stream comprises a quantization start parameter and a quantization step parameter; and

step (b) comprises the step of generating the quantization matrices using the base matrix, the quantization start parameter, and the quantization step parameter.

28. The process of claim 27, wherein:

the encoded bit stream further comprises a DC coefficient step parameter; and

step (b) comprises the step of generating a plurality of intraframe quantization matrices using the base matrix, the quantization start parameter, the quantization step parameter, and the DC coefficient step parameter.

29. The process of claim 24, wherein:

the encoded bit stream comprises a flag indicating whether dequantization may be implemented using bit shifts; and

step (c) comprises the step of dequantizing the encoded video signals using bit shifts.

30. The process of claim 23, wherein:

the encoded bit stream comprises;

a flag indicating whether the base matrix is a default base matrix;

the quantization start parameter;

the quantization step parameter;

the DC coefficient step parameter;

the interframe tilt parameter;

the intraframe tilt parameter; and

a flag indicating whether dequantization may be implemented using bit shifts;

step (b) comprises the steps of;

(1) generating a plurality of intraframe quantization matrices using an intraframe base matrix, the intraframe tilt parameter, the quantization start parameter, the quantization step parameter, and the DC step parameter; and

(2) generating a plurality of interframe quantization matrices using an interframe base matrix, the interframe tilt parameter, the quantization start parameter, and the quantization step parameter; and

step (c) comprises the step of decoding the encoded video signals using the intraframe quantization matrices and the interframe quantization matrices.

31. The process of claim 30, wherein the encoded bit stream comprises:

a 6-bit QuantStart parameter;

a 6-bit QuantStep parameter;

a 6-bit DCstep parameter;

a 6-bit Tilt[0] parameter;

a 6-bit Tilt[1] parameter; and

a 1-bit PowersOf2 parameter.

32. The process of claim 31, wherein the encoded bit stream further comprises:

a 384-bit interframe base matrix; and

a 384-bit intraframe base matrix.

33. An apparatus for decoding video signals, comprising:

(a) means for providing an encoded bit stream comprising encoded video signals and one or more quantization matrix parameters;

(b) means for generating a plurality of quantization matrices using the quantization matrix parameters; and

(c) means for decoding the encoded video signals using the quantization matrices to generate decoded video signals.

34. The apparatus of claim 33, wherein means (b) comprises means for generating the quantization matrices using at least one base matrix.

35. The apparatus of claim 34, wherein the encoded bit stream comprises a flag indicating whether the base matrix is a default base matrix.

36. The apparatus of claim 34, wherein:

the encoded bit stream comprises a tilt parameter; and

means (b) comprises means for generating the quantization matrices using the base matrix and the tilt parameter.

37. The apparatus of claim 34, wherein:

the encoded bit stream comprises a quantization start parameter and a quantization step parameter; and

means (b) comprises means for generating the quantization matrices using the base matrix, the quantization start parameter, and the quantization step parameter.

38. The apparatus of claim 37, wherein:

the encoded bit stream further comprises a DC coefficient step parameter; and

means (b) comprises means for generating a plurality of intraframe quantization matrices using the base matrix, the quantization start parameter, the quantization step parameter, and the DC coefficient step parameter.

39. The apparatus of claim 34, wherein:

the encoded bit stream comprises a flag indicating whether dequantization may be implemented using bit shifts; and

means (c) comprises means for dequantizing the encoded video signals using bit shifts.

44. The apparatus of claim 33, wherein the apparatus is connected to a bus and the bus is further connected to a memory device.