Non-volatile memory system card with flash erasable sectors of EEprom cells including a mechanism for substituting defective cells
First Claim
1. A memory card connectable to a computer system, said memory card comprising:
- an array of non-volatile floating gate memory cells partitioned into a plurality of sectors that individually include a distinct group of said array of memory cells that are erasable together as a unit, the individual sectors including a user data portion and a spare portion of the group of memory cells,a memory controller for controlling operation of the memory cell array and interfacing the memory cell array with the computer system,means within said memory controller for identifying defective cells within the user data portion of individual ones of said plurality of sectors, andmeans including said memory controller and responsive to detection of a defective cell within the user data portion of one of said plurality of sectors for substituting therefore a corresponding redundant cell within the spare portion of said one of said plurality of sectors.
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0 Petitions
Accused Products
Abstract
A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.
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Citations
14 Claims
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1. A memory card connectable to a computer system, said memory card comprising:
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an array of non-volatile floating gate memory cells partitioned into a plurality of sectors that individually include a distinct group of said array of memory cells that are erasable together as a unit, the individual sectors including a user data portion and a spare portion of the group of memory cells, a memory controller for controlling operation of the memory cell array and interfacing the memory cell array with the computer system, means within said memory controller for identifying defective cells within the user data portion of individual ones of said plurality of sectors, and means including said memory controller and responsive to detection of a defective cell within the user data portion of one of said plurality of sectors for substituting therefore a corresponding redundant cell within the spare portion of said one of said plurality of sectors. - View Dependent Claims (2, 3, 4)
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5. A method of operating a computer system including a processor and a memory system, wherein the memory system includes an array of non-volatile floating gate memory cells partitioned into a plurality of sectors that individually include a distinct group of said array of memory cells that are erasable together as a unit, comprising:
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providing said memory array and a memory controller within a card that is removably connectable to the computer system, said controller being connectable to said processor for controlling operation of the array when the card is connected to the computer system, reserving a portion of the memory cells within the individual sectors as spare cells, remaining cells of the individual sectors being designated for storing data, enabling the controller to detect when a cell within the data portion of a sector becomes defective, causing the controller to store an address of such a detected defective cell, and thereafter causing the controller to substitute for the defective cell a redundant cell from the spare cells of the sector in which the defective cell is detected. - View Dependent Claims (6, 7, 8, 9, 10, 11, 12, 13, 14)
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Specification