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Write verify schemes for flash memory with multilevel cells

  • US 5,539,690 A
  • Filed: 06/02/1994
  • Issued: 07/23/1996
  • Est. Priority Date: 06/02/1994
  • Status: Expired due to Term
First Claim
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1. In a memory device including at least one memory cell having a voltage level that indicates one of n possible states, where n is greater than 2, each state corresponding to a predetermined range of threshold voltage levels, a method for verifying successful programming of the memory cell to a desired state, the method comprising the steps of:

  • selecting a first reference, the first reference corresponding to a first threshold voltage level that defines a first lower bound of a first state;

    selecting a second reference, the second reference corresponding to a second threshold voltage level that defines a second lower bound of a second state;

    selecting a third reference, the third reference corresponding to a third threshold voltage level that defines a third lower bound of a third state;

    applying a programming voltage to the memory cell;

    sensing the threshold voltage level of the memory cell;

    comparing the threshold voltage level of the memory cell to the first reference;

    outputting a first result of comparing the threshold voltage level of the memory cell to the first reference;

    comparing the threshold voltage level of the memory cell to a selected one of the second reference and the third reference, a selection between the second and third references being made in response to the first result;

    outputting a second result of comparing the threshold voltage level of the memory cell to the selected one of the second reference and the third reference;

    comparing the first result and the second result to an expected value, the expected value indicating the desired state; and

    indicating successful programming if the first result and the second result are equal to the expected value.

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