Apparatus and method for providing secured communications

• US 5,539,828 A
• Filed: 05/31/1994
• Issued: 07/23/1996
• Est. Priority Date: 05/31/1994
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Davis, Derek L.
• Primary Examiner(s): Gregory, Bernarr E.
• Application Number:
  US08/251,486
• Time in Patent Office: 784 Days
• Field of Search: 380/30, 380/4, 380/44, 380/49, 380/50, 380/52, 380/59, 380/9, 380/23, 380/25, 380/46
• US Class Current: 713/173
• CPC Class Codes: G06Q 20/341 Active cards, i.e. cards including their own processing means, e.g. including an IC or chip
• CPC Class Codes: G06Q 20/40975 using encryption therefor
• CPC Class Codes: G07F 7/1008 Active credit-cards provided with means to personalise their use, e.g. with PIN-introduction/comparison system
• CPC Class Codes: H04L 2209/12 Details relating to cryptographic hardware or logic circuitry
• CPC Class Codes: H04L 2209/60 Digital content management, e.g. content distribution
• CPC Class Codes: H04L 9/0662 with particular pseudorandom sequence generator
• CPC Class Codes: H04L 9/0894 Escrow, recovery or storing of secret information, e.g. secret key escrow or cryptographic key storage
• CPC Class Codes: H04L 9/3263 involving certificates, e.g. public key certificate [PKC] or attribute certificate [AC]; Public key infrastructure [PKI] arrangements network architectures or network communication protocols for supporting authentication of entities using certificates in a packet data network H04L63/0823
• CPC Class Codes: H04L 9/3271 using challenge-response

Abstract

A semiconductor device for storing encryption/decryption keys at manufacture in combination with digital certificates to ensure secured communications between the semiconductor device and another device. The semiconductor device comprising a non-volatile memory for storing the encryption/decryption keys and at least one digital certificate, internal memory for temporarily storing information input into the semiconductor device from the other device and possibly encryption and decryption algorithms, a processor for processing the information and a random number generator for generating the encryption/decryption keys completely internal to the hardware agent.

Claims

1. A semiconductor device comprising:

processing means for processing information within said semiconductor device;

first storage means for storing a uniquely designated key pair and at least one digital certificate, said first storage means being coupled to said processing means;

second storage means for storing at least said information processed by said processing means, said second storage means being coupled to said processing means;

interface means for enabling communications with said semiconductor device, said interface means being coupled to said processing means; and

means for generating said uniquely designated key pair internally within the semiconductor device, said means for generating being coupled to said processing means.

2. The semiconductor device according to claim 1, wherein said storage means includes non-volatile memory for maintaining said uniquely designated key pair and said at least one digital certificate even in a non-powered state.

3. The semiconductor device according to claim 2, wherein said at least one digital certificate includes a device certificate.

4. The semiconductor device according to claim 3, wherein said at least one digital certificate includes a second level certificate.

5. The semiconductor device according to claim 2, wherein said second storage means further includes random access memory for temporarily storing said information.

6. The semiconductor device according to claim 1, wherein said generating means includes a random number generator.

7. The semiconductor device according to claim 6 wherein said interface means includes an interface to provide a communication link allowing said semiconductor device to decrypt and store information transmitted to said semiconductor device and to encrypt and transmit information external to said semiconductor device.

8. A semiconductor device for encoding and decoding information, said semiconductor device comprising:

non-volatile memory for storing a uniquely designated key pair and at least one digital certificate for authenticating information transmitted into the semiconductor device;

random access memory for storing said information;

a processing unit for at least internally processing said information, said processing unit being coupled to said non-volatile memory and said random access memory;

an interface for enabling communication with said semiconductor device, said interface being coupled to said processing unit; and

a random number generator for generating said uniquely designated key pair internally within the semiconductor device, said random number generator being coupled to said processing unit.

9. The semiconductor device according to claim 8, wherein said non-volatile memory is storing a device certificate.

10. The semiconductor device according to claim 9, wherein said non-volatile memory is also storing a second level certificate.

11. A system comprising:

memory means for storing at least one encryption and decryption program;

host processing means for executing said encryption and decryption programs;

bus means for coupling said host processing means and said memory means; and

agent means, being coupled to said bus means, for internally decrypting input information and encrypting output information, said agent means including;

processing means for processing said input and output information within said agent means;

first storage means for storing a uniquely designated key pair and at least one digital certificate used for decrypting said input information and encrypting said output information, said first storage means being coupled to said processing means;

second storage means for temporarily storing at least said input and output information,

interface means for enabling secured communication with said system, said interface means being coupled to said processing means, and

means for generating said uniquely designated key pair internally within the agent means, said means for generating being coupled to said processing means.

12. The system according to claim 11, wherein said first storage means includes non-volatile memory for storing said uniquely designated key pair and said at least one digital certificate in a non-powered state.

13. The system according to claim 12, wherein said at least one digital certificate includes a device certificate.

14. The system according to claim 13, wherein said at least one digital certificate further includes a second level certificate.

15. The system according to claim 12, wherein said second storage means includes random access memory for temporarily storing said information and at least one encryption and decryption algorithm.

16. The system according to claim 11, wherein said generating means includes a random number generator.

17. A system comprising:

a memory element for storing at least one encryption and decryption program;

a host processor for executing said encryption and decryption programs;

a bus for coupling said host processor and said memory element; and

a hardware agent, being coupled to said bus, for internally decrypting input information from a remote device and encrypting output information for transmission to said remote device, said hardware agent including;

a processor for processing said input and output information within said hardware agent,

a non-volatile storage element for storing a uniquely designated key pair and a device certificate both of which are used for decrypting said input information and encrypting said output information, said non-volatile storage element being coupled to said processor,

a volatile storage element for temporarily storing said input and output information,

a random number generator for generating said uniquely designated key pair internally within the hardware agent, and

an interface for enabling secured communication between said hardware agent and said remote device, said interface being coupled to said processor.