Method and a circuit for gradationally driving a flat display device

• US 5,541,618 A
• Filed: 03/16/1995
• Issued: 07/30/1996
• Est. Priority Date: 11/28/1990
• Status: Expired due to Term

• Current Assignee: Hitachi Consumer Electronics Company Limited (Hitachi, Ltd.)
• Original Assignee: Fujitsu Limited
• Inventors: Shinoda, Tsutae
• Primary Examiner(s): Weldon, Ulysses
• Assistant Examiner(s): Mengistu, Amare
• Application Number:
  US08/405,920
• Time in Patent Office: 502 Days
• Field of Search: 345/60, 345/63, 345/68, 345/87, 313/169.1, 313/169.3, 313/169.4
• US Class Current: 345/60
• CPC Class Codes: G09G 3/2022 using sub-frames
• CPC Class Codes: G09G 3/2025 the sub-frames having all the same time duration
• CPC Class Codes: G09G 3/2092 Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165
• CPC Class Codes: G09G 3/2927 Details of initialising
• CPC Class Codes: G09G 3/2935 Addressed by erasing selected cells that are in an ON state
• CPC Class Codes: G09G 3/294 for lighting or sustain discharge
• CPC Class Codes: G09G 3/2946 by introducing variations of the frequency of sustain pulses within a frame or non-proportional variations of the number of sustain pulses in each subfield
• CPC Class Codes: G09G 3/297 using opposed discharge type panels
• CPC Class Codes: G09G 3/298 using surface discharge panels

Abstract

A method and circuit of driving a flat display panel formed of a plurality of cells each having a memory function, where the cells are formed at cross points of a plurality of X-electrodes and a plurality of Y-electrode orthogonal to the X-electrodes, a period of a frame for displaying a single picture is divided into a plurality of sequential subframes. Each of the subframes comprises: an addressing period during which cells to be lit later in a display period are selected from all the cells by being written by having a wall charge therein; and the display period subsequent to the address period for lighting the selected cells by applying sustain pulses to all the cells. A number of the sustain pulses included in each display period is predetermined differently for each subframe according to a weight given to each subframe. Gradation of visual brightness of each cell is determined by the accumulated number of the sustain pulses included in the subframes that are selectively operated during a single frame according to a required brightness level for each cell. Thus, an adequate time length can be allocated to required number of subframes to achieve a quality brightness-gradation for each cell.

Claims

1. A method of driving a PDP matrix display panel having a plurality of pixels located at cross-points of scan electrodes and data electrodes, each of said pixels having a memory function, said method comprising the steps of:

dividing a period of a frame displaying a single picture into a plurality of subframes, each subframe having a concurrent addressing period and a concurrent display period for all scan electrodes,

said addressing period concurrent to all of said scan electrodes of said single picture, for addressing a pixel by selectively forming a memory medium according to said memory function in a selected one of the pixels on each sequentially selected one of all the scan electrodes;

said display period, subsequent to said addressing period, for lighting said addressed pixel by a concurrent application of sustain pulses to all the pixels, each subframe being allocated with a predetermined number of said sustain pulses, and each subframe including a different one of said allocated numbers so as to weight a gradation to said respective subframe,

wherein a gradation of visual brightness of said lit pixel is determined by selectively operating said subframe for each of said pixels for each frame.

2. A method as recited in claim 1, wherein said addressing period comprises the steps of:

applying a write pulse to all the pixels so as to form a memory medium in each of said pixels; and

selectively erasing said memory medium.

3. A method as recited in claim 2, wherein said addressing period comprises the steps of:

applying a write pulse concurrently to all the pixels; and

selectively erasing said memory medium on a selected one of said scan electrodes.

4. A method as recited in claim 1, wherein a number of sustain pulses in said subframe is determined by a time length of said display period containing sustain pulses of a constant frequency, said number of sustain pulses being different for each subframe.

5. A method as recited in claim 1, wherein said number of sustain pulses in said subframe is determined by a frequency of sustain pulses applied in said display period, said frequency is different for each subframe.

6. A method as recited in claim 1, wherein said memory medium is formed of a wall charge in a pixel of said display panel.

7. A method as recited in claim 6, wherein said display panel is an AC-type display panel.

8. A driving circuit for providing a gradation of visual brightness of a PDP matrix flat display panel formed of a plurality of pixels located at crossed points of the matrix, each of said pixels having a memory function, said driving circuit comprising:

first means for dividing with time a single frame to be displayed on the panel into a plurality of subframes, each subframe having a concurrent address period and a concurrent display period for all scan electrodes;

second means for selectively forming a memory medium according to said memory function in said pixels during said address period, for lighting said pixels having said memory medium formed therein during said display period by concurrently applying sustain pulses to all pixels subsequent to said address period, each subframe including a different number of sustain pulses in each display period, and for selectively operating said subframes, wherein the gradation of visual brightness of the pixel is determined by accumulation of time lengths of display periods of said selectively operated subframes through said single frame.

9. A method of driving a PDP matrix display panel, formed of a plurality of pixels each having a charge accumulated therein, said method comprising the steps of:

dividing a period of a frame displaying a single picture into a plurality of subframes, each subframe having a concurrent addressing period and a concurrent display period for all scan electrodes

said addressing period, for addressing a pixel by

applying a sustain pulse concurrently to all the pixels,

applying a write pulse concurrently to all the pixels, and

applying an erase pulse sequentially to each selected one of the pixels, and

said display period for lighting said addressed pixels by a concurrent application of sustain pulses to all the pixels, each subframe being allocated with a predetermined number of said sustain pulses, each subframe including a different one of said allocated numbers so as to weight a gradation to said respective subframe,

wherein a gradation of visual brightness of said lit pixel is determined by selectively operating said subframe for each of said pixels for each frame.

10. A method of driving a PDP matrix display panel, formed of a plurality of pixels each having a charge accumulated therein, said method comprising the steps of:

dividing a period of a frame displaying a single picture into a plurality of subframes, each subframe having a concurrent addressing period and a concurrent display period for all scan electrodes

said addressing period for addressing a pixel by selectively applying a write pulse to each selected one of the pixels, said write pulse forming a memory medium in a selected one of all the pixels, and

said display period for lighting said addressed pixel by a concurrent application of sustain pulses to all the pixels, each subframe being allocated with a predetermined number of said sustain pulses, said allocated number being different for each subframe so as to weight a gradation to said respective subframe,

wherein a gradation of visual brightness of said lit pixel is determined by selectively operating said subframe for each of said pixels for each frame.

11. A method of driving a PDP matrix display panel having a plurality of pixels located at cross-points of scan electrodes and data electrodes, each of said pixels being capable of storing display data by having a charge remaining therein, said method comprising the steps of:

dividing a period of a frame displaying a single picture into a plurality of subframes, each subframe having a concurrent addressing period and a concurrent display period for all scan electrodes

said addressing period, concurrent to all of said scan electrodes of said single picture, for addressing a pixel by selectively forming said charge in a selected one of the pixels on each sequentially selected one of all the scan electrodes;

said display period, subsequent to said address period, for lighting said addressed pixel by a concurrent application of sustain pulses to all the pixels, each subframe being allocated with a predetermined number of said sustain pulses, each subframe including a different one of said allocated numbers so as to weight a gradation to said respective subframe,

wherein a gradation of visual brightness of said lit pixel is determined by selectively operating said subframe for each of said pixels for each frame.