Method and apparatus for adaptive interrupt servicing in data processing system

• US 5,542,076 A
• Filed: 05/20/1993
• Issued: 07/30/1996
• Est. Priority Date: 06/14/1991
• Status: Expired due to Term

• Current Assignee: Enterasys Networks Incorporated (Extreme Networks, Inc.)
• Original Assignee: Digital Equipment Corporation (HP Inc.)
• Inventors: Sawyer, David S., Ciarfella, Paul W., Benson, David, Hayden, Peter C.
• Primary Examiner(s): Moore, David K.
• Assistant Examiner(s): HAFIZ, TARIQ R
• Application Number:
  US08/065,515
• Time in Patent Office: 1,167 Days
• Field of Search: 395/275, 395/325, 395/725, 395/775, 395/250, 395/425, 395/500, 395/427-497.04, 395/280-312, 395/726-742, 395/821-894, 377/15, 364/134, 340/825.06
• US Class Current: 710/260
• CPC Class Codes: G06F 13/24 using interrupt G06F13/32 takes precedence
• CPC Class Codes: G06F 2213/2404 Generation of an interrupt or a group of interrupts after a predetermined number of interrupts
• CPC Class Codes: G06F 9/4812 by interrupt, e.g. masked

Abstract

A method and apparatus for adaptive interrupt servicing is disclosed. The number of interrupts occurring within a predetermined time period is counted and stored as a value in an interrupt counter. At the end of each interrupt service, the interrupt counter value is compared to a predefined threshold value. If the value in the interrupt counter equals or exceeds the threshold value, further interrupt servicing is disabled.

Claims

1. In a data processing system, apparatus for adaptively servicing interrupts, comprising:

a timer, coupled to a processor, for generating a clock signal having a predetermined time period;

a tuning logic coupled to an input terminal of said timer and to the input terminal of a threshold register, said tuning logic responsive to the processor, said tuning logic for changing said predetermined threshold value stored in said threshold register in response to data from the processor;

means for counting interrupts from a plurality of ancillary devices occurring within the predetermined time period while interrupt servicing is enabled, said counting resulting in a number value;

means for comparing said number value to a predetermined threshold value; and

means for disabling interrupts servicing if said number value equals or exceeds said threshold value.

2. The apparatus of claim 1 further comprising the means for adjusting said predetermined time period in response to a signal from a processor in the data processing system.

3. The apparatus of claim 1 further comprising the means for adjusting said threshold value in response to signals from a processor in the data processing system.

4. A data processing system, including a plurality of sources of interrupt signals and a processor receiving and processing the interrupt signals, comprising:

an interrupt counter, coupled to the processor, for counting the interrupt signals;

a threshold register, coupled to the processor, for storing a predetermined threshold value;

means, responsive to the processor, for selectively disabling interrupt processing by the processor if the number of interrupt signals counted by said interrupt counter equals or exceeds said predetermined threshold value;

a timer, coupled to the processor, for generating a clock signal having a predetermined time period; and

a tuning logic coupled to an input terminal of said timer and to the input terminal of said threshold register, said tuning logic responsive to the processor, said tuning logic for changing said predetermined threshold value stored in said threshold register in response to data from the processor.