Direct chip attachment (DCA) with electrically conductive adhesives

• US 5,543,585 A
• Filed: 02/02/1994
• Issued: 08/06/1996
• Est. Priority Date: 02/02/1994
• Status: Expired due to Term

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: International Business Machines Corporation
• Inventors: Murco, Robert M., Gaynes, Michael A., Saraf, Ravi, Zalesinski, Jerzy M., Puligandla, Viswanadham, Booth, Richard B., Roldan, Judith M.
• Primary Examiner(s): TSO, LAURA K
• Application Number:
  US08/190,507
• Time in Patent Office: 916 Days
• Field of Search: 174/260, 174/261, 361/768, 361/760, 361/767, 361/770, 361/777
• US Class Current: 174/261
• CPC Class Codes: H01L 21/563 Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
• CPC Class Codes: H01L 2224/13 of an individual bump connector
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/1319 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/274 by blanket deposition of the material of the layer connector
• CPC Class Codes: H01L 2224/73104 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73203 Bump and layer connectors
• CPC Class Codes: H01L 2224/8319 Arrangement of the layer connectors prior to mounting
• CPC Class Codes: H01L 2224/838 Bonding techniques
• CPC Class Codes: H01L 2224/90 Methods for connecting semiconductor or solid state bodies using means for bonding not being attached to, or not being formed on, the body surface to be connected, e.g. pressure contacts using springs or clips
• CPC Class Codes: H01L 24/10 Bump connectors bumps on insulating substrates, e.g. chip carriers, H01L23/49816; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/13 of an individual bump connector
• CPC Class Codes: H01L 24/27 Manufacturing methods
• CPC Class Codes: H01L 24/28 Structure, shape, material or disposition of the layer connectors prior to the connecting process
• CPC Class Codes: H01L 24/83 using a layer connector
• CPC Class Codes: H01L 24/90 Methods for connecting semiconductor or solid state bodies using means for bonding not being attached to, or not being formed on, the body surface to be connected, e.g. pressure contacts using springs or clips
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01087 : Francium [Fr]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/07802 : not being an ohmic electrical conductor
• CPC Class Codes: H01L 2924/0781 : being an ohmic electrical conductor
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: Y10T 29/49204 : Contact or terminal manufacturing
• CPC Class Codes: Y10T 29/49222 : forming array of contacts or terminals

Abstract

A simple process for card assembly by Direct Chip Attachment (DCA) uses electrically conductive adhesives. Two methods create the same intermediate wafer product with a layer of insulative thermoplastic and conductive thermoplastic bumps. After sawing or dicing the wafer to form the chips, the chips are adhered to chip carriers with conductive pads which match the conductive thermoplastic bumps, using heat and pressure. Chips may be easily removed and replaced using heat.

Claims

1. An integrated circuit chip with a matrix of conductive interconnections for direct chip attachment, said matrix comprising:

a matrix of thin, electrically conductive metal pads on a major surface of the chip;

a layer of dry thermoplastic adhesive forming a chip attachment surface, said layer including;

bumps of electrically conductive adhesive deposited on each of the metal pads; and

an electrically insulating adhesive filling around the conductive bumps and covering the major surface of the chip betw said een the bumps and extending from the major surface of the chip to said surface for attachment to form a unitary structure around the bumps.

2. An integrated circuit chip as recited in claim 1 wherein said insulating adhesive contains a dielectric thermoplastic and a solid insulating filler to control a coefficient of thermal expansion of the adhesive.

3. An integrated circuit chip as recited in claim 2 wherein said insulating filler is selected from the group consisting of glass particles and ceramic particles.

4. An integrated circuit chip as recited in claim 1 wherein said conductive adhesive includes a thermoplastic modified by adding a conductive filler.

5. An integrated circuit chip as recited in claim 4 wherein said conductive filler includes conductive particles comprising a conductive material selected from the group consisting of Au, Ag, Pd, and oxide free noble alloys thereof.

6. An integrated circuit chip as recited in claim 1 wherein said conductive adhesive and said insulating adhesive are selected to have similar properties and chemical compatibility.

7. An integrated circuit chip as recited in claim 1 wherein said insulating adhesive includes a polymer.

8. An integrated circuit chip as recited in claim 1 wherein said insulating adhesive includes a polymer selected from the group consisting of nylons, polysulfones, polyesters, polyimides, and siloxanes.

9. An integrated circuit chip as recited in claim 1 wherein said insulating adhesive includes a copolymer, said copolymer being selected from the group consisting of random copolymers, segmented copolymers, and block copolymers.

10. An integrated circuit chip as recited in claim 1 wherein said insulating adhesive includes a blend of at least two different polymeric materials.

11. An integrated circuit chip as recited in claim 1 wherein the chip surface includes a thin passivation layer of polyimide.

12. An integrated circuit chip as recited in claim 1 wherein said insulating adhesive includes a copolymer, said copolymer being selected from the group consisting of an ethylene/vinyl acetate copolymer, a siloxane/aryl-ether copolymer, and a polyurethane copolymer.

13. An integrated circuit chip as recited in claim 1 wherein said insulating adhesive includes a blend of at least two different polymeric materials, said blend selected from the group consisting of a blend of ethylene-acetate copolymer with polyethylene, a blend of ethylene and vinyl acetate and polyvinyl chloride, and a blend of polyester and polyvinyl chloride.

14. An integrated circuit chip as recited in claim 1 wherein said conductive adhesive includes a polymer.

15. An integrated circuit chip as recited in claim 1 wherein said conductive adhesive includes a polymer selected from the group consisting of nylons, polysulfones, polyesters, polyimides, and siloxanes.

16. An integrated circuit chip as recited in claim 1 wherein said conductive adhesive includes a copolymer, said copolymer being selected from the group consisting of random copolymers, segmented copolymers, and block copolymers.

17. An integrated circuit chip as recited in claim 1 wherein said conductive adhesive includes a blend of at least two different polymeric materials.

18. An integrated circuit chip as recited in claim 1 wherein said conductive adhesive includes a copolymer, said copolymer being selected from the group consisting of an ethylene/vinyl acetate copolymer, a siloxane/aryl-ether copolymer, and a polyurethane copolymer.

19. An integrated circuit chip as recited in claim 1 wherein said conductive adhesive includes a blend of at least two different polymeric materials, said blend selected from the group consisting of a blend of ethylene-acetate copolymer with polyethylene, a blend of ethylene and vinyl acetate and polyvinyl chloride, and a blend of polyester and polyvinyl chloride.

20. An interconnection substrate with a matrix of conductive interconnects for direct attachment to a mirror image matrix of conductive metal contacts on a major surface of another substrate, said interconnection substrate comprising:

a matrix of thin, electrically conductive, metal pads on a major surface of the interconnection substrate; and

a dry composite single layer of polymerized thermoplastic adhesive forming a surface for attachment to said mirror image matrix of conductive metal pads and said major surface of said another substrate, including;

a deposit of electrically conductive adhesive on each of the metal pads for bonding to a metal pad and to a metal contact to form a reliable electrical interconnection, and

electrically insulating adhesive around the conductive deposit sufficiently thick for filling the volume between the substrates and around the deposit after bonding the insulating adhesive to the major surface of said another substrate.

21. An interconnect structure, comprising;

a substrate with at least one matrix of thin, electrically conductive, metal interconnect pads on a major surface;

at least one integrated circuit chip with a matrix of thin, electrically conductive, metal interconnect pads on a major surface and in which the chip matrix is a mirror image of the substrate matrix and confronts the substrate matrix to define confronting pairs of metal pads;

a single layer of dry electrically conductive, thermoplastic adhesive connecting between each respective confronting pair of metal pads and bonded directly to both such pair of metal pads to form electrical interconnections; and

a single layer of dry electrically insulating, void free, thermoplastic adhesive which is bonded directly to both the surface of the substrate and surface of the chip and extending around the electrically conductive adhesive to fill a volume between the chip and substrate to encapsulate the electrical interconnections.