Insulated gate field effect transistor

• US 5,543,636 A
• Filed: 06/07/1995
• Issued: 08/06/1996
• Est. Priority Date: 05/18/1984
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei
• Primary Examiner(s): Crane, Sara W.
• Assistant Examiner(s): Wallace, Valencia Martin
• Application Number:
  US08/473,953
• Time in Patent Office: 426 Days
• Field of Search: 257/66, 257/346, 257/347, 257/368, 257/376, 257/403
• US Class Current: 257/66
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/0245 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02576 N-type
• CPC Class Codes: H01L 21/02667 Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 21/268 using electromagnetic radiation, e.g. laser radiation
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/78666 with normal-type structure, e.g. with top gate
• CPC Class Codes: Y10S 257/914 Polysilicon containing oxygen, nitrogen, or carbon, e.g. sipos

Abstract

An insulated gate field effect transistor which may be of the thin film type including a non-single crystalline semiconductor layer containing hydrogen or a halogen and having an intrinsic conductivity type. The semiconductor layer is disposed over a substrate including a channel region disposed in the semiconductor layer. Source and drain regions form respective junctions with the channel region where the channel region is disposed between the source and drain regions whereby charge carriers move through the channel region between the source and drain regions in a path substantially parallel to said substrate. A gate insulating film contacts the channel region and includes silicon and nitrogen. A gate electrode contacts the gate insulating film. At least a portion of the channel region contains at least one of oxygen, nitrogen, and carbon in an amount of not exceeding 5×10¹⁸ atoms/cm³.

Claims

1. An insulated-gate field effect transistor comprising:

a non-single crystalline semiconductor layer doped with a hydrogen or halogen and having an intrinsic conductivity type;

a channel region formed in said semiconductor layer, wherein a concentration of at least one of oxygen, carbon and nitrogen contained in said semiconductor layer is not higher than 5×

10¹⁸ atoms/cm³ ;

source and drain regions forming respective junctions with said channel region whereby charge carriers move through said channel region between said source and drain regions in a path substantially parallel to said substrate;

a gate insulator comprising silicon nitride and directly contacting said channel region; and

a gate electrode contacting said gate insulator;

wherein said channel region is interposed between the gate insulator and another insulator.

2. An insulated-gate field effect transistor comprising:

a non-single crystalline semiconductor layer doped with a hydrogen or halogen and having an intrinsic conductivity type;

a channel region formed in said semiconductor layer, wherein a concentration of at least one of oxygen, carbon and nitrogen contained in at least a portion of said channel region is not higher than 5×

10¹⁸ atoms/cm³ ;

source and drain regions forming respective junctions with said channel region whereby charge carriers move through said channel region between said source and drain regions in a path substantially parallel to said substrate;

a gate insulator comprising silicon nitride and directly contacting said channel region; and

a gate electrode contacting said gate insulator;

wherein said channel region is interposed between the gate insulator and another insulator.

3. A thin film transistor comprising:

a non-single crystalline semiconductor layer doped with a hydrogen or halogen and having an intrinsic conductivity type and having a channel region disposed in the semiconductor layer;

source and drain regions forming respective junctions with said channel region where the channel region is disposed between said source and drain regions whereby charge carriers move through said channel region between said source and drain regions in a path substantially parallel to said substrate,

a gate insulating film comprising silicon nitride and directly contacting said channel region; and

a gate electrode contacting said gate insulating film;

wherein at least a portion of said channel region contains oxygen in an amount not exceeding 5×

10¹⁸ atoms/cm³ ;

wherein said channel region is interposed between the gate insulating film and another insulator.

4. A thin film transistor comprising:

a non-single crystalline semiconductor layer doped with a hydrogen or halogen and having an intrinsic conductivity type and having a channel region disposed in the semiconductor layer;

source and drain regions forming respective junctions with said channel region where the channel region is disposed between said source and drain regions whereby charge carriers move through said channel region between said source and drain regions in a path substantially parallel to said substrate,

a gate insulating film comprising silicon nitride and directly contacting said channel region; and

a gate electrode contacting said gate insulating film;

wherein at least a portion of said channel region contains nitrogen in an amount not exceeding 5×

10¹⁸ atoms/cm³ ;

wherein said channel region is interposed between the gate insulating film and another insulator.

5. A thin film transistor comprising:

a non-single crystalline semiconductor layer doped with a hydrogen or halogen and having an intrinsic conductivity type and having a channel region disposed in the semiconductor layer;

source and drain regions forming respective junctions with said channel region where the channel region is disposed between said source and drain regions whereby charge carriers move through said channel region between said source and drain regions in a path substantially parallel to said substrate,

a gate insulating film comprising silicon nitride and directly contacting said channel region; and

a gate electrode contacting said gate insulating film;

wherein at least a portion of said channel region contains carbon in an amount not exceeding 5×

10¹⁸ atoms/cm³ ;

wherein said channel region is interposed between the gate insulating film and another insulator.

6. An insulated-gate field effect transistor comprising:

a non-single crystalline semiconductor layer of an intrinsic conductivity type containing hydrogen or a halogen, said semiconductor layer being disposed over a substrate;

a channel region formed in said semiconductor layer, wherein a concentration of at least one of oxygen, carbon and nitrogen contained in at least a portion of said semiconductor layer is not higher than 5×

10¹⁸ atoms/cm³ ;

source and drain regions forming respective junctions with said channel region whereby charge carriers move through said channel region between said source and drain regions in a path substantially parallel to said substrate;

a gate insulator contacting said channel region and comprising silicon and nitrogen; and

a gate electrode contacting said gate insulator.

7. An insulated-gate field effect transistor comprising:

a non-single crystalline semiconductor layer of an intrinsic conductivity type containing hydrogen or a halogen, said semiconductor layer being disposed over a substrate;

a channel region formed in said semiconductor layer, wherein a concentration of at least one of oxygen, carbon and nitrogen contained in at least a portion of said channel region is not higher than 5×

10¹⁸ atoms/cm³ ;

source and drain regions forming respective junctions with said channel region whereby charge carriers move through said channel region between said source and drain regions in a path substantially parallel to said substrate;

a gate insulator contacting said channel region and comprising silicon and nitrogen; and

a gate electrode contacting said gate insulator.

8. A thin film transistor comprising:

a non-single crystalline semiconductor layer containing hydrogen or a halogen and having an intrinsic conductivity type, said semiconductor layer being disposed over a substrate including a channel region disposed in the semiconductor layer;

source and drain region forming respective junctions with said channel region where the channel region is disposed between said source and drain regions whereby charge carriers move through said channel region between said source and drain regions in a path substantially parallel to said substrate,

a gate insulating film contacting said channel region and comprising silicon and nitrogen; and

a gate electrode contacting said gate insulating film;

wherein at least a portion of said channel region contains oxygen in an amount of not exceeding 5×

10¹⁸ atoms/cm³.

9. A thin film transistor comprising:

a non-single crystalline semiconductor layer containing hydrogen or a halogen and having an intrinsic conductivity type, said semiconductor layer being disposed over a substrate including a channel region disposed in the semiconductor layer;

source and drain region forming respective junctions with said channel region where the channel region is disposed between said source and drain regions whereby charge carriers move through said channel region between said source and drain regions in a path substantially parallel to said substrate,

a gate insulating film contacting said channel region and comprising silicon and nitrogen; and

a gate electrode contacting said gate insulating film;

wherein at least a portion of said channel region contains nitrogen in an amount of not exceeding 5×

10¹⁸ atoms/cm³.

10. A thin film transistor comprising:

a non-single crystalline semiconductor layer containing hydrogen or a halogen and having an intrinsic conductivity type, said semiconductor layer being disposed over a substrate including a channel region disposed in the semiconductor layer;

source and drain region forming respective junctions with said channel region where the channel region is disposed between said source and drain regions whereby charge carriers move through said channel region between said source and drain regions in a path substantially parallel to said substrate,

a gate insulating film contacting said channel region; and

a gate electrode contacting said gate insulating film and comprising silicon and nitrogen;

wherein at least a portion of said channel region contains carbon in an amount of not exceeding 5×

10¹⁸ atoms/cm³.