Electronic device enclosure including a conductive cap and substrate

• US 5,545,912 A
• Filed: 10/27/1994
• Issued: 08/13/1996
• Est. Priority Date: 10/27/1994
• Status: Expired due to Term

• Current Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Koury, Daniel N., Hughes, Henry G., Schmiesing, John E., Gutteridge, Ronald J., Ristic, Ljubisa
• Primary Examiner(s): BROWN, PETER T
• Application Number:
  US08/329,927
• Time in Patent Office: 656 Days
• Field of Search: 257/414-418, 257/659-660, 257/532, 257/784, 257/786, 257/420, 73/517 R, 73/517 AV, 73/517 A, 361/283
• US Class Current: 257/417
• CPC Class Codes: G01P 1/023 for acceleration measuring devices
• CPC Class Codes: G01P 15/125 by capacitive pick-up
• CPC Class Codes: H01L 2224/48095 Kinked
• CPC Class Codes: H01L 2924/19041 being a capacitor
• CPC Class Codes: H01L 2924/3011 Impedance
• CPC Class Codes: H01L 2924/3025 Electromagnetic shielding

Abstract

An enclosure (8) for an electronic device (26) such as, for example, an accelerometer. The enclosure (8) includes a conductive semiconductor substrate (12) underlying the electronic device (26), a conductive cap (16) overlying the electronic device (26), and a power supply (25) having one or more outputs (27, 29) each with a substantially fixed potential wherein one output is electrically coupled to the conductive semiconductor substrate (12) and another output to the conductive cap (16). In a preferred embodiment, substrate ( 12 ) and cap (16) are coupled to the same power supply output (27). This coupling substantially eliminates the adverse effects of parasitic capacitances of the substrate (12) and cap (16) to reduce measurement error and EMI when a capacitive accelerometer is used as the electronic device (26).

Claims

1. An enclosure for an electronic device comprising:

a conductive semiconductor substrate underlying said electronic device;

a dielectric layer on said substrate;

a conductive cap overlying said electronic device and bonded to said dielectric layer using a bonding layer; and

a power supply output having a substantially fixed potential, wherein said power supply output is electrically coupled to said conductive semiconductor substrate and to said conductive cap.

2. The enclosure of claim 1 further comprising a metal layer disposed on said conductive cap, wherein said metal layer is electrically connected to said power supply output.

3. The enclosure of claim 1 wherein said electronic device is a capacitive accelerometer having a bottom plate disposed overlying said conductive semiconductor substrate, having a middle plate overlying said bottom plate and movable in response to an acceleration force, and having a top plate overlying said middle plate.

4. The enclosure of claim 3 wherein said substantially fixed potential is substantially equal to a potential applied to said middle plate.

5. The enclosure of claim 3 wherein said bottom plate is directly on said dielectric layer.

6. The enclosure of claim 1 wherein said power supply output is provided by a bandgap regulator power supply.

7. The enclosure of claim 1 wherein:

said conductive semiconductor substrate has a dopant concentration greater than about 10¹⁸ atoms/cm³ ; and

said conductive cap is a semiconductor having a dopant concentration greater than about 10¹⁸ atoms/cm³.

8. The enclosure of claim 1 wherein said bonding layer further provides a hermetically sealed environment for said electronic device.

9. The enclosure of claim 1 wherein said bonding layer has been patterned to provide a cavity and said electronic device is sealed in said cavity.

10. The enclosure of claim 1 wherein:

said conductive semiconductor substrate is n-type silicon; and

said conductive cap is n-type silicon.

11. The enclosure of claim 10 wherein said bonding layer has a thickness less than about 50 microns.

12. The enclosure of claim 1 wherein at least a portion of said bonding layer is conductive.

13. The enclosure of claim 1 wherein said bonding layer is an insulating layer.

14. An enclosure for an electronic device comprising:

a conductive semiconductor substrate underlying said electronic device;

a conductive cap overlying said electronic device;

a power supply output having a substantially fixed potential, wherein said power supply output is electrically coupled to said conductive semiconductor substrate and to said conductive cap; and

a bonding pad disposed on said conductive semiconductor substrate, wherein said bonding pad is electrically connected to said power supply output.

15. The enclosure of claim 14 further comprising a metal layer disposed on said conductive cap, wherein said bonding pad is connected to said metal layer by an electrical conductor.

16. An enclosure for an electronic device comprising:

a conductive semiconductor substrate underlying said electronic device;

a dielectric layer on said substrate;

a conductive cap overlying said electronic device and bonded to said dielectric layer using a bonding layer;

a first power supply output having a substantially fixed potential, wherein said first power supply output is electrically coupled to said conductive semiconductor substrate; and

a second power supply output having a substantially fixed potential, wherein said second power supply output is electrically coupled to said conductive cap.