Semiconductor architecture and application thereof
First Claim
1. A semiconductor element assembly comprising:
- (a) a non-planar substrate including a plurality of substrata, wherein said plurality of substrata are interconnected to form a cavity;
(b) a semiconductor material coupled to said non-planar substrate, said semiconductor material including a plurality of integrated circuits interconnected for communication; and
(c) an operation supporting means for supporting the operation of the semiconductor element assembly, wherein said operation supporting means is disposed within said cavity.
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Accused Products
Abstract
A new technology in semiconductor electronics is provided wherein basic semiconductor elements (BSEs) are fabricated on the surfaces of hollow, cone-shaped and/or other planar or non-planar substrata. Photosensitive and photoemitting elements are included within each BSE capable of transmitting and receiving signals to and from external sources in a direction that is non-parallel (oblique) to the silicon surface and circuitry plane. Inter-BSE communication are also achieved via fiber optic connectors. In one embodiment, the BSEs may be assembled in an efficient arrangement whereby some number of BSEs (for example, six (6)) are located adjacent and surrounding another "polar" BSE, thereby providing for short opto-electronic connections between the polar BSE and its neighbors. In additional embodiments, a power supply may reside within the internal space of the BSE, and the interior and exterior of the BSEs are designed as opposite electrical poles, thereby providing power to the BSEs. A highly effective method of cooling may also be provided by transferring coolant within conduits into the interior of each BSE, through the power supply and between the exterior of the internal power supply and the substrata. The present invention may also be applied, in one embodiment, to accept visual information in much the same way as the eye of an animal.
34 Citations
24 Claims
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1. A semiconductor element assembly comprising:
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(a) a non-planar substrate including a plurality of substrata, wherein said plurality of substrata are interconnected to form a cavity; (b) a semiconductor material coupled to said non-planar substrate, said semiconductor material including a plurality of integrated circuits interconnected for communication; and (c) an operation supporting means for supporting the operation of the semiconductor element assembly, wherein said operation supporting means is disposed within said cavity. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24)
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Specification