Power down state machine for PCMCIA PC card applications

• US 5,546,590 A
• Filed: 09/19/1994
• Issued: 08/13/1996
• Est. Priority Date: 09/19/1994
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Pierce, Michael E.
• Primary Examiner(s): Ray, Gopal C.
• Application Number:
  US08/308,835
• Time in Patent Office: 694 Days
• Field of Search: 395/750, 395/401, 395/750, 364/707, 364/492, 365/227, 365/226
• US Class Current: 713/323
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode

Abstract

An apparatus and method for removing and applying power to circuitry within a Personal Computer Memory Card International Association (PCMCIA) PC card so as to reduce power consumption and, thus, prolong battery life for a portable computer system or electronic device, hereinafter referred to as a host system, in which the PC card is plugged is described. The PC card employs logic controlled by the host system to properly sequence control lines to and removal of power from the PC card circuitry to be powered down so as to prevent the occurrence of a CMOS latchup condition, allow for data to be saved and later restored when the circuitry is powered up, and maximize reduction in power consumption by the host system.

Claims

1. A method for removing power to certain circuitry of a peripheral device, said certain circuitry comprising a microcontroller volatile and nonvolatile memory, application logic, and a microcontroller and application logic clock, said method for removing power to certain circuitry controlled by control logic of said peripheral device, said peripheral device coupled in communication with a computer system, comprising the steps of:

a) notifying said peripheral device to power down;

b) notifying said microcontroller of a pending power down event;

c) saving information in said volatile memory to said nonvolatile memory;

d) setting a flag in said nonvolatile memory indicating said information has been saved;

e) transferring said microcontroller to a halt state;

f) shutting off inputs driven by said microcontroller to circuitry including said control logic of said peripheral device other than said certain circuitry to which power is to be removed;

g) asserting and holding a reset signal to said microcontroller and said certain circuitry to which power is to be removed;

h) disabling inputs to said certain circuitry to which power is to be removed;

i) disabling and removing power from said microcontroller and application logic clock;

j) removing power from said certain circuitry excluding said microcontroller; and

k) removing power from said microcontroller.

2. A method for applying power to certain circuitry of a peripheral device, said certain circuitry comprising a microcontroller, volatile and nonvolatile memory, application logic, and a microcontroller and application logic clock, said method for applying power to certain circuitry controlled by control logic of said peripheral device, said peripheral device coupled in communication with a computer system, comprising the steps of:

a) notifying said peripheral device to power up;

b) applying power to and enabling said microcontroller and application logic clock;

c) applying power to said certain circuitry including said microcontroller;

d) waiting a length of time for said microcontroller and application logic clock to stabilize;

e) enabling inputs to said certain circuitry to which power has been applied, including inputs to said microcontroller;

f) asserting a reset signal to said microcontroller and said certain circuitry to which power has been applied;

g) enabling inputs driven by said microcontroller to circuitry including said control logic of said peripheral device other than said certain circuitry;

h) deasserting said reset signal to said microcontroller and said certain circuitry to which power has been applied, allowing said microcontroller to begin operating; and

i) checking a flag in said nonvolatile memory to determine whether information has been saved on a previous power down, and, if information has been saved, retrieving said information from said nonvolatile memory.

3. A method for removing power to certain circuitry of a peripheral device coupled in communication with a computer system, said certain circuitry comprising a microcontroller, a memory, and a clock, said method controlled by a control logic circuit in said peripheral device, comprising the steps of:

a) notifying said peripheral device to power down;

b) notifying said microcontroller of a pending power down event;

c) transferring said microcontroller to a halt state;

d) shutting off inputs driven by said microcontroller to circuitry other than said certain circuitry;

e) disabling inputs to said certain circuitry;

f) removing power from said clock; and

g) removing power from said certain circuitry.

4. A method for applying power to certain circuitry of a peripheral device coupled in communication with a computer system, said certain circuitry comprising a microcontroller, a memory, and a clock, said method controlled by a control logic circuit in said peripheral device, comprising the steps of:

a) notifying said peripheral device to power up;

b) applying power to said clock;

c) applying power to said certain circuitry;

d) waiting a length of time for said clock to stabilize;

e) enabling inputs to said certain circuitry;

f) deasserting said reset signal to said certain circuitry;

g) enabling inputs driven by said microcontroller to circuitry other than said certain circuitry; and

h) deasserting said reset signal to said certain circuitry.

5. A method for removing power to certain circuitry of a peripheral device coupled in communication with a computer system, said certain circuitry comprising a microcontroller, a volatile and nonvolatile memory, and a clock, said method controlled by a control logic circuit in said peripheral device, comprising the steps of:

a) notifying said peripheral device to power down;

b) notifying said microcontroller of a pending power down event;

c) said microcontroller saving information in said volatile memory to said nonvolatile memory;

d) said microcontroller setting a flag in said nonvolatile memory indicating said information has been saved;

e) transferring said microcontroller to a halt state;

f) shutting off inputs driven by said microcontroller to circuitry other than said certain circuitry, including said control logic circuit;

g) asserting and holding a reset signal to said certain circuitry;

h) disabling inputs to said certain circuitry;

i) removing power from said clock;

j) removing power from said certain circuitry excluding said microcontroller; and

k) removing power from said microcontroller.

6. A method for applying power to certain circuitry of a peripheral device coupled in communication with a computer system, said certain circuitry comprising a microcontroller, a volatile and nonvolatile memory, and a clock, said method controlled by a control logic circuit in said peripheral device, comprising the steps of:

a) notifying said peripheral device to power up;

b) applying power to said clock;

c) applying power to said certain circuitry;

d) waiting for said clock to stabilize;

e) enabling inputs to said certain circuitry;

f) asserting a reset signal to said certain circuitry;

g) enabling inputs driven by said microcontroller to circuitry other than said certain circuitry, including said control logic circuit;

h) deasserting said reset signal to said certain circuitry, allowing said microcontroller to begin operating; and

i) checking a flag in said nonvolatile memory to determine whether information has been saved on a previous power down, and, if information has been saved, retrieving said information from said nonvolatile memory.